Patents by Inventor Jong Myoung Son

Jong Myoung Son has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140332940
    Abstract: A quad flat no-lead (QFN) integrated circuit package is provided. The QFN integrated circuit package includes an insulating adhesive layer, a semiconductor chip attached to the insulating adhesive layer, and a lead frame bent to be electrically connected to the semiconductor chip and attached to the insulating adhesive layer. The QFN integrated circuit package according the present invention does not use a die paddle and is thus thin. Accordingly, the volume of the package can be minimized.
    Type: Application
    Filed: July 1, 2013
    Publication date: November 13, 2014
    Inventor: Jong Myoung SON
  • Patent number: 8802498
    Abstract: A method of manufacturing a semiconductor package having no chip pad includes preparing a polyimide tape on which an adhesive layer is arranged; forming lead members on the adhesive layer so as to form a plurality of semiconductor packages in a matrix form; attaching the polyimide tape to a carrier; performing wire bonding to mount semiconductor chips on the polyimide tape and connect the lead members and the semiconductor chips; forming an encapsulation member to encapsulate the semiconductor chips, the lead members, and wires; detaching the encapsulation member from the carrier and the polyimide tape; forming conductive layers each on a surface of the lead member exposed through a surface of the encapsulation member; and performing a singulation process on the encapsulation member with the conductive layers formed thereon to define unit semiconductor packages.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: August 12, 2014
    Assignee: STS Semiconductor & Telecommunications Co., Ltd.
    Inventor: Jong Myoung Son