Patents by Inventor Jong-Oh Seo
Jong-Oh Seo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240340589Abstract: A display device includes a thin-film transistor layer disposed on a substrate and including thin-film transistors; and an emission material layer disposed on the thin-film transistor layer. The emission material layer includes light-emitting elements each including a first light-emitting electrode, an emissive layer and a second light-emitting electrode, light-receiving elements each including a first light-receiving electrode, a light-receiving semiconductor layer and a second light-receiving electrode, and a first bank disposed on the first light-emitting electrode and defining an emission area of each of the light-emitting elements. The light-receiving elements are disposed on the first bank.Type: ApplicationFiled: June 21, 2024Publication date: October 10, 2024Applicant: Samsung Display Co., LTD.Inventors: Seung Lyong BOK, Jong In BAEK, Young Seok SEO, Sun Mi YU, Jong Hyun LEE, Jin Oh KWAG
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Patent number: 12102119Abstract: An aerosol-generating article according to an embodiment may include a medium portion, a front end plug disposed to face an upstream end of the medium portion, and a filter portion disposed to face a downstream end of the medium portion, wherein the front end plug includes a channel extending from the upstream end to the downstream end.Type: GrantFiled: November 15, 2019Date of Patent: October 1, 2024Assignee: KT&G CORPORATIONInventors: Jin Chul Yang, Soo Ho Kim, Jong Yeol Kim, Man Seok Seo, Ki Jin Ahn, In Hyeog Oh
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Publication number: 20240268151Abstract: A display device includes a light-emitting device; a first transistor that outputs a driving current applied to the light-emitting device; a second transistor that transmits a data voltage to a first electrode of the first transistor; and a third transistor electrically connected to a second electrode and a gate electrode of the first transistor, a first semiconductor layer of the first transistor includes fluorine ions, a third semiconductor layer of the third transistor includes a third lower doping layer and a third upper doping layer sequentially disposed, a concentration of phosphorus ions of the third lower doping layer is greater than a concentration of phosphorus ions of the third upper doping layer, and a concentration of boron ions of the third upper doping layer is greater than a concentration of boron ions of the third lower doping layer.Type: ApplicationFiled: November 21, 2023Publication date: August 8, 2024Applicant: Samsung Display Co., LTD.Inventors: Jong Oh SEO, Jong Jun BAEK
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Patent number: 12047761Abstract: A display device includes a thin-film transistor layer disposed on a substrate and including thin-film transistors; and an emission material layer disposed on the thin-film transistor layer. The emission material layer includes light-emitting elements each including a first light-emitting electrode, an emissive layer and a second light-emitting electrode, light-receiving elements each including a first light-receiving electrode, a light-receiving semiconductor layer and a second light-receiving electrode, and a first bank disposed on the first light-emitting electrode and defining an emission area of each of the light-emitting elements. The light-receiving elements are disposed on the first bank.Type: GrantFiled: December 19, 2022Date of Patent: July 23, 2024Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Seung Lyong Bok, Jong In Baek, Young Seok Seo, Sun Mi Yu, Jong Hyun Lee, Jin Oh Kwag
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Publication number: 20240057377Abstract: Provides is a manufacturing method of a display device including steps of forming a semiconductor on a substrate; applying a doping solution to the semiconductor layer; and doping by heat treating the semiconductor layer to which the doping solution is applied, wherein the doping solution includes a solvent and a dopant, and the dopant contains at least one of triethyl borate, tris(trimethylsilyl)borate, and trimethylboroxine.Type: ApplicationFiled: August 9, 2023Publication date: February 15, 2024Inventors: Hiroshi OKUMURA, Jong Oh SEO
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Publication number: 20240008319Abstract: A display device includes a substrate including an opening, a buffer layer disposed on the substrate, a semiconductor disposed on the buffer layer, a gate electrode overlapping at least a portion of the semiconductor in a plan view, a source electrode and a drain electrode electrically connected to the semiconductor, and a light-emitting device electrically connected to the drain electrode. The opening of the substrate overlaps another portion of the semiconductor in a plan view.Type: ApplicationFiled: March 3, 2023Publication date: January 4, 2024Applicant: Samsung Display Co., LTD.Inventors: Jong Oh SEO, Dong-Min LEE
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Patent number: 11715739Abstract: An embodiment provides a manufacturing method of a polycrystalline silicon layer, including: forming a first amorphous silicon layer on a substrate; doping an N-type impurity into the first amorphous silicon layer; forming a second amorphous silicon layer on the n-doped first amorphous silicon layer; doping a P-type impurity into the second amorphous silicon layer; and crystalizing the n-doped first amorphous silicon layer and the p-doped second amorphous silicon layer by irradiating a laser beam onto n-doped first amorphous silicon layer and the p-doped second amorphous silicon layer to form a polycrystalline silicon layer.Type: GrantFiled: June 4, 2021Date of Patent: August 1, 2023Assignee: Samsung Display Co., Ltd.Inventors: Jong Oh Seo, Jong Jun Baek
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Patent number: 11706949Abstract: A display device and a method of manufacturing a display device are provided. A display device includes a lower conductive pattern disposed on a substrate, a lower insulating layer disposed on the lower conductive pattern, the lower insulating layer including a first lower insulating pattern including an overlapping region overlapping the lower conductive pattern, and a protruding region. The display device includes a semiconductor pattern disposed on the first lower insulating pattern and having a side surface, the side surface being aligned with a side surface of the first lower insulating pattern or disposed inward from the side surface of the first lower insulating pattern, a gate insulating layer disposed on the semiconductor pattern, a gate electrode disposed on the gate insulating layer, and an empty space disposed between the substrate and the protruding region of the first lower insulating pattern.Type: GrantFiled: March 4, 2021Date of Patent: July 18, 2023Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Jong Oh Seo, Byung Soo So
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Publication number: 20230132252Abstract: A transistor substrate includes a substrate, a semiconductor layer overlapping the substrate, and a gate electrode overlapping the semiconductor layer. The semiconductor layer includes a channel unit, a conductive unit directly connected to an end of the channel unit, and an edge unit positioned at an edge of the conductive unit. A carbon concentration of the edge unit is higher than each of a carbon concentration of the channel unit and a carbon concentration of the conductive unit.Type: ApplicationFiled: March 8, 2022Publication date: April 27, 2023Inventors: Jong Oh SEO, Hiroshi OKUMURA, Jae Woo JEONG
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Publication number: 20230106004Abstract: A display device includes: a substrate; a semiconductor layer on the substrate, and including a channel of at least one transistor; a first insulating layer on the semiconductor layer; and a gate electrode on the first insulating layer. The semiconductor layer includes polycrystalline silicon, and the channel includes: a first region containing a first impurity; and a second region containing a second impurity different from the first impurity.Type: ApplicationFiled: May 23, 2022Publication date: April 6, 2023Inventors: Jong Oh SEO, Jang Hyun KIM, Byung Soo SO, Jae Woo JEONG
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Publication number: 20230005966Abstract: A display device includes a substrate, a semiconductor layer, an insulating layer, and a conductive layer. The semiconductor layer is disposed on the substrate, includes a channel of a first transistor, and includes a channel of a second transistor. The insulating layer is disposed on the semiconductor layer. The conductive layer is disposed on the insulating layer, includes a gate electrode of the first transistor, and includes a gate electrode of the second transistor. The channel of the first transistor includes a first first-element impurity ion and a second-element impurity ion different from the first first-element impurity ion. The channel of the second transistor includes a second first-element impurity ion identical to the first first-element impurity ion.Type: ApplicationFiled: February 4, 2022Publication date: January 5, 2023Inventors: Jong Oh Seo, Jang Hyun Kim, Jae Woo Jeong, Jong Hoon Choi
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Publication number: 20220216285Abstract: A method of manufacturing a display device including forming a polysilicon layer on a substrate, patterning the polysilicon layer to form a polysilicon pattern including a first region and a second region each having a first thickness, and a third region having a second thickness less than the first thickness, forming a gate insulation layer on the polysilicon pattern, forming a gate electrode on the gate insulation layer, partially implanting ions into the polysilicon pattern to form an active layer, forming an insulation interlayer on the gate electrode, forming source and drain contact holes each passing through the insulation interlayer and the gate insulation layer and respectively overlapping the first region and the second region, forming source and drain electrodes respectively filling the source and drain contact holes, and forming a light emitting element electrically connected to the source electrode or the drain electrode.Type: ApplicationFiled: March 30, 2020Publication date: July 7, 2022Inventors: Jong-Oh SEO, Ji-Hwan KIM, Byung-Soo SO, Dong-Min LEE, Jong-Hoon CHOI
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Publication number: 20220199721Abstract: A method of manufacturing a polycrystalline silicon layer, includes forming an amorphous silicon layer on a substrate; doping the amorphous silicon layer with at least one impurity; cleaning the amorphous silicon layer with hydrofluoric acid; rinsing the amorphous silicon layer with hydrogen-added deionized water; and forming a polycrystalline silicon layer by irradiating a laser beam onto the amorphous silicon layer.Type: ApplicationFiled: September 9, 2021Publication date: June 23, 2022Inventors: Jong Jun BAEK, Jong Oh Seo
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Publication number: 20220190142Abstract: A method of manufacturing transistor may include forming an active layer on a base substrate, forming a sacrificial layer on the active layer, doping a first dopant ion in the active layer through a first ion implantation process, removing the sacrificial layer, forming a gate insulating layer; and forming a gate electrode on the gate insulating layer.Type: ApplicationFiled: December 14, 2021Publication date: June 16, 2022Inventors: JAEWOO JEONG, Jong Oh SEO
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Publication number: 20220077261Abstract: An embodiment provides a manufacturing method of a polycrystalline silicon layer, including: forming a first amorphous silicon layer on a substrate; doping an N-type impurity into the first amorphous silicon layer; forming a second amorphous silicon layer on the n-doped first amorphous silicon layer; doping a P-type impurity into the second amorphous silicon layer; and crystalizing the n-doped first amorphous silicon layer and the p-doped second amorphous silicon layer by irradiating a laser beam onto n-doped first amorphous silicon layer and the p-doped second amorphous silicon layer to form a polycrystalline silicon layer.Type: ApplicationFiled: June 4, 2021Publication date: March 10, 2022Inventors: Jong Oh SEO, Jong Jun BAEK
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Publication number: 20210359057Abstract: A display device and a method of manufacturing a display device are provided. A display device includes a lower conductive pattern disposed on a substrate, a lower insulating layer disposed on the lower conductive pattern, the lower insulating layer including a first lower insulating pattern including an overlapping region overlapping the lower conductive pattern, and a protruding region. The display device includes a semiconductor pattern disposed on the first lower insulating pattern and having a side surface, the side surface being aligned with a side surface of the first lower insulating pattern or disposed inward from the side surface of the first lower insulating pattern, a gate insulating layer disposed on the semiconductor pattern, a gate electrode disposed on the gate insulating layer, and an empty space disposed between the substrate and the protruding region of the first lower insulating pattern.Type: ApplicationFiled: March 4, 2021Publication date: November 18, 2021Applicant: Samsung Display Co., LTD.Inventors: Jong Oh SEO, Byung Soo SO
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Patent number: 10539803Abstract: An optical system for a laser apparatus includes: a long-short axis reversing module that includes a splitter, a first mirror, and a second mirror positioned in a propagation path of an incident laser beam, where the first mirror includes a first submirror and a second submirror connected to each other at a predetermined angle therebetween. The optical system converts an incident laser beam having an asymmetric energy distribution into an emitted laser beam with a symmetric energy distribution.Type: GrantFiled: May 6, 2016Date of Patent: January 21, 2020Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Byung Soo So, Jong Oh Seo, Dong-Min Lee, Sang Ho Jeon
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Patent number: 10446638Abstract: An organic light emitting diode display includes a substrate, a scan line on the substrate to transfer a scan signal, a data line on the substrate to transfer a data signal, a switching transistor connected with the scan line and the data line, a driving transistor connected with the switching transistor, and an organic light emitting diode electrically connected to the driving transistor. The driving transistor may include a first semiconductor layer, the switching transistor may include a second semiconductor layer, and the first semiconductor layer may have a surface roughness that is greater than that of the second semiconductor layer.Type: GrantFiled: July 23, 2018Date of Patent: October 15, 2019Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Jong Oh Seo, Byung Soo So, Dong-Min Lee, Dong-Sung Lee
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Patent number: 10411133Abstract: A manufacturing method of a polysilicon layer of a thin film transistor of a display device, includes: irradiating a first excimer laser beam having a first energy density to an amorphous silicon layer including an oxidation layer thereon, to form a first polysilicon layer including thereon portions of the oxidation layer at grain boundaries of the first polysilicon layer; removing the portions of the oxidation layer at the grain boundaries of the first polysilicon layer; and irradiating a second excimer laser beam having a second energy density of 80% to 100% of the first energy density to the first polysilicon layer from which the portions of the oxidation layer at the grain boundaries thereof are removed, to form a second polysilicon layer as the polysilicon layer of the thin film transistor.Type: GrantFiled: April 9, 2018Date of Patent: September 10, 2019Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Jong Oh Seo, Byung Soo So, Dong-Min Lee, Dong-Sung Lee
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Publication number: 20190123123Abstract: An organic light emitting diode display includes a substrate, a scan line on the substrate to transfer a scan signal, a data line on the substrate to transfer a data signal, a switching transistor connected with the scan line and the data line, a driving transistor connected with the switching transistor, and an organic light emitting diode electrically connected to the driving transistor. The driving transistor may include a first semiconductor layer, the switching transistor may include a second semiconductor layer, and the first semiconductor layer may have a surface roughness that is greater than that of the second semiconductor layer.Type: ApplicationFiled: July 23, 2018Publication date: April 25, 2019Inventors: Jong Oh SEO, Byung Soo SO, Dong-Min LEE, Dong-Sung LEE