Patents by Inventor Jong Rip Kim
Jong Rip Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11011482Abstract: A semiconductor package includes a semiconductor chip, an encapsulant, and an interconnection member. The semiconductor chip has connection pads. The encapsulant encapsulates a portion of the semiconductor chip. The interconnection member includes a first insulating layer disposed on the encapsulant and a portion of the semiconductor chip, a redistribution layer disposed on the first insulating layer, and a second insulating layer disposed on the first insulating layer and the redistribution layer. The redistribution layer is electrically connected to the connection pads of the semiconductor chip, and a thickness of the second insulating layer is greater than a thickness of the first insulating layer.Type: GrantFiled: June 30, 2020Date of Patent: May 18, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Doo Hwan Lee, Jong Rip Kim, Hyoung Joon Kim, Jin Yul Kim, Kyung Seob Oh
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Publication number: 20200335460Abstract: A semiconductor package includes a semiconductor chip, an encapsulant, and an interconnection member. The semiconductor chip has connection pads. The encapsulant encapsulates a portion of the semiconductor chip. The interconnection member includes a first insulating layer disposed on the encapsulant and a portion of the semiconductor chip, a redistribution layer disposed on the first insulating layer, and a second insulating layer disposed on the first insulating layer and the redistribution layer. The redistribution layer is electrically connected to the connection pads of the semiconductor chip, and a thickness of the second insulating layer is greater than a thickness of the first insulating layer.Type: ApplicationFiled: June 30, 2020Publication date: October 22, 2020Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Doo Hwan LEE, Jong Rip Kim, Hyoung Joon Kim, Jin Yul Kim, Kyung Seob OH
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Patent number: 10714437Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip; and a passivation layer disposed on the second interconnection member.Type: GrantFiled: February 26, 2018Date of Patent: July 14, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Doo Hwan Lee, Jong Rip Kim, Hyoung Joon Kim, Jin Yul Kim, Kyung Seob Oh
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Patent number: 10600748Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip; and a passivation layer disposed on the second interconnection member.Type: GrantFiled: December 13, 2016Date of Patent: March 24, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Doo Hwan Lee, Jong Rip Kim, Hyoung Joon Kim, Jin Yul Kim, Kyung Seob Oh
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Patent number: 10566289Abstract: A fan-out semiconductor package may include: a first connection member having a through hole; a semiconductor chip disposed in the through hole and having an active surface on which a connection pad is disposed and a non-active surface opposing the active surface; an encapsulant at least partially encapsulating the first connection member and the non-active surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pad, wherein the first connection member includes a first insulating layer, a first redistribution layer embedded in the first insulating layer while contacting the second connection member, and a second redistribution layer disposed on the other side of the first insulating layer opposing one side thereof in which the first redistribution layer is embedded.Type: GrantFiled: October 5, 2016Date of Patent: February 18, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Doo Hwan Lee, Kyung Seob Oh, Jong Rip Kim, Hyoung Joon Kim
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Publication number: 20190385956Abstract: A semiconductor chip includes: a body; holes disposed in a first surface of the body; and a warpage preventing member including filling members disposed in the holes.Type: ApplicationFiled: August 29, 2019Publication date: December 19, 2019Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Ung Hui SHIN, Jong Rip KIM, Doo Hwan LEE, Sung Hwan CHO
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Patent number: 10448512Abstract: There are provided a printed circuit board and a method to manufacture the same. The printed circuit board includes a core board including an insulating layer and a cavity, an electronic element in the cavity, and an insulating member disposed between inner surfaces of the cavity and the electronic element. A modulus of elasticity of the insulating member is lower than a modulus of elasticity of the insulating layer.Type: GrantFiled: September 28, 2015Date of Patent: October 15, 2019Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Doo Hwan Lee, Jong Rip Kim, Ung Hui Shin, Sung Hwan Cho
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Patent number: 10104767Abstract: A printed circuit board includes: a strip substrate sectioned into unit areas; electronic components respectively installed in each of the unit areas; and a separation space disposed between the unit areas.Type: GrantFiled: March 28, 2016Date of Patent: October 16, 2018Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Hyung-Gi Ha, Jong-Myeon Lee, Jong-Rip Kim
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Patent number: 10026702Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip; and a passivation layer disposed on the second interconnection member.Type: GrantFiled: December 13, 2016Date of Patent: July 17, 2018Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Doo Hwan Lee, Jong Rip Kim, Hyoung Joon Kim, Jin Yul Kim, Kyung Seob Oh
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Publication number: 20180190602Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip; and a passivation layer disposed on the second interconnection member.Type: ApplicationFiled: February 26, 2018Publication date: July 5, 2018Inventors: Doo Hwan LEE, Jong Rip KIM, Hyoung Joon KIM, Jin Yul KIM, Kyung Seob OH
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Publication number: 20180138127Abstract: An electronic component package and a method of manufacturing an electronic component package are provided. An electronic component package includes a frame having a cavity, an electronic component disposed in the cavity, a redistribution layer disposed adjacent to the frame and electrically connected to the electronic component, and an encapsulation material encapsulating the electronic component and having an elastic modulus smaller than that of a material constituting the frame.Type: ApplicationFiled: December 22, 2017Publication date: May 17, 2018Inventors: Doo Hwan LEE, Hyoung Joon KIM, Jong Rip KIM, Kyung Seob OH, Ung Hui SHIN
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Patent number: 9960128Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip; and a passivation layer disposed on the second interconnection member.Type: GrantFiled: December 13, 2016Date of Patent: May 1, 2018Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Doo Hwan Lee, Jong Rip Kim, Hyoung Joon Kim, Jin Yul Kim, Kyung Seob Oh
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Patent number: 9929100Abstract: An electronic component package and a method of manufacturing an electronic component package are provided. An electronic component package includes a frame having a cavity, an electronic component disposed in the cavity, a redistribution layer disposed adjacent to the frame and electrically connected to the electronic component, and an encapsulation material encapsulating the electronic component and having an elastic modulus smaller than that of a material constituting the frame.Type: GrantFiled: March 21, 2016Date of Patent: March 27, 2018Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Doo Hwan Lee, Hyoung Joon Kim, Jong Rip Kim, Kyung Seob Oh, Ung Hui Shin
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Publication number: 20170365566Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip; and a passivation layer disposed on the second interconnection member.Type: ApplicationFiled: December 13, 2016Publication date: December 21, 2017Inventors: Doo Hwan LEE, Jong Rip KIM, Hyoung Joon KIM, Jin Yul KIM, Kyung Seob OH
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Patent number: 9786573Abstract: An electronic component package includes: a core including a cavity, a first resin layer, a second resin layer and a reinforcing layer disposed between the first resin layer and the second resin layer; and an electronic component disposed in the cavity, wherein a thickness of the first resin layer is different from a thickness of the second resin layer.Type: GrantFiled: July 8, 2016Date of Patent: October 10, 2017Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jong-Rip Kim, Doo-Hwan Lee, Jong-Myeon Lee
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Publication number: 20170103951Abstract: A fan-out semiconductor package may include: a first connection member having a through hole; a semiconductor chip disposed in the through hole and having an active surface on which a connection pad is disposed and a non-active surface opposing the active surface; an encapsulant at least partially encapsulating the first connection member and the non-active surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pad, wherein the first connection member includes a first insulating layer, a first redistribution layer embedded in the first insulating layer while contacting the second connection member, and a second redistribution layer disposed on the other side of the first insulating layer opposing one side thereof in which the first redistribution layer is embedded.Type: ApplicationFiled: October 5, 2016Publication date: April 13, 2017Inventors: Doo Hwan LEE, Kyung Seob OH, Jong Rip KIM, Hyoung Joon KIM
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Publication number: 20170079143Abstract: A printed circuit board includes: a strip substrate sectioned into unit areas; electronic components respectively installed in each of the unit areas; and a separation space disposed between the unit areas.Type: ApplicationFiled: March 28, 2016Publication date: March 16, 2017Applicant: Samsung Electro-Mechanic Co., Ltd.Inventors: Hyung-Gi HA, Jong-Myeon LEE, Jong-Rip KIM
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Publication number: 20170018474Abstract: An electronic component package includes: a core including a cavity, a first resin layer, a second resin layer and a reinforcing layer disposed between the first resin layer and the second resin layer; and an electronic component disposed in the cavity, wherein a thickness of the first resin layer is different from a thickness of the second resin layer.Type: ApplicationFiled: July 8, 2016Publication date: January 19, 2017Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Jong-Rip KIM, Doo-Hwan LEE, Jong-Myeon LEE
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Publication number: 20160307847Abstract: An electronic component package and a method of manufacturing an electronic component package are provided. An electronic component package includes a frame having a cavity, an electronic component disposed in the cavity, a redistribution layer disposed adjacent to the frame and electrically connected to the electronic component, and an encapsulation material encapsulating the electronic component and having an elastic modulus smaller than that of a material constituting the frame.Type: ApplicationFiled: March 21, 2016Publication date: October 20, 2016Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Doo Hwan LEE, Hyoung Joon KIM, Jong Rip KIM, Kyung Seob OH, Ung Hui SHIN
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Publication number: 20160276292Abstract: A semiconductor chip includes: a body; holes disposed in a first surface of the body; and a warpage preventing member including filling members disposed in the holes.Type: ApplicationFiled: January 11, 2016Publication date: September 22, 2016Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Ung Hui Shin, Jong Rip Kim, Doo Hwan Lee, Sung Hwan Cho