Patents by Inventor Jong-Rong Jan

Jong-Rong Jan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Electronic devices including offset conductive bumps
    Patent number: 7579694
    Abstract: Bumping a substrate having a metal layer thereon may include forming a barrier layer on the substrate including the metal layer and forming a conductive bump on the barrier layer. Moreover, the barrier layer may be between the conductive bump and the substrate, and the conductive bump may be laterally offset from the metal layer. After forming the conductive bump, the barrier layer may be removed from the metal layer thereby exposing the metal layer while maintaining a portion of the barrier layer between the conductive bump and the substrate. Related structures are also discussed.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: August 25, 2009
    Assignee: Unitive International Limited
    Inventors: Jong-Rong Jan, Tsai-Hua Lu, Sao-Ling Chiu, Ling-Chen Kung
  • Electronic devices including offset conductive bumps
    Publication number: 20060231951
    Abstract: Bumping a substrate having a metal layer thereon may include forming a barrier layer on the substrate including the metal layer and forming a conductive bump on the barrier layer. Moreover, the barrier layer may be between the conductive bump and the substrate, and the conductive bump may be laterally offset from the metal layer. After forming the conductive bump, the barrier layer may be removed from the metal layer thereby exposing the metal layer while maintaining a portion of the barrier layer between the conductive bump and the substrate. Related structures are also discussed.
    Type: Application
    Filed: June 2, 2006
    Publication date: October 19, 2006
    Inventors: Jong-Rong Jan, Tsai-Hua Lu, Sao-Ling Chiu, Ling-Chen Kung
  • Methods of selectively bumping integrated circuit substrates and related structures
    Patent number: 7081404
    Abstract: Bumping a substrate having a metal layer thereon may include forming a barrier layer on the substrate including the metal layer and forming a conductive bump on the barrier layer. Moreover, the barrier layer may be between the conductive bump and the substrate, and the conductive bump may be laterally offset from the metal layer. After forming the conductive bump, the barrier layer may be removed from the metal layer thereby exposing the metal layer while maintaining a portion of the barrier layer between the conductive bump and the substrate. Related structures are also discussed.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: July 25, 2006
    Assignee: Unitive Electronics Inc.
    Inventors: Jong-Rong Jan, Tsai-Hua Lu, Sao-Ling Chiu, Ling-Chen Kung
  • Methods of selectively bumping integrated circuit substrates and related structures
    Publication number: 20040209406
    Abstract: Bumping a substrate having a metal layer thereon may include forming a barrier layer on the substrate including the metal layer and forming a conductive bump on the barrier layer. Moreover, the barrier layer may be between the conductive bump and the substrate, and the conductive bump may be laterally offset from the metal layer. After forming the conductive bump, the barrier layer may be removed from the metal layer thereby exposing the metal layer while maintaining a portion of the barrier layer between the conductive bump and the substrate. Related structures are also discussed.
    Type: Application
    Filed: February 17, 2004
    Publication date: October 21, 2004
    Inventors: Jong-Rong Jan, Tsai-Hua Lu, Sao-Ling Chiu, Ling-Chen Kung