Patents by Inventor Jong-Ryol Ryu

Jong-Ryol Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6849520
    Abstract: A trench isolation in a semiconductor device, and a method for fabricating the same, includes: forming a trench having inner sidewalls for device isolation in a silicon substrate; forming an oxide layer on a surface of the silicon substrate that forms the inner sidewalls of the trench; supplying healing elements to the silicon substrate to remove dangling bonds; and filling the trench with a device isolation layer, thereby forming the trench isolation without dangling bonds causing electrical charge traps.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: February 1, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chul-Sung Kim, Si-Young Choi, Jung-Woo Park, Jong-Ryol Ryu, Byeong-Chan Lee
  • Patent number: 6835996
    Abstract: A trench isolation in a semiconductor device, and a method for fabricating the same, includes: forming a trench having inner sidewalls for device isolation in a silicon substrate; forming an oxide layer on a surface of the silicon substrate that forms the inner sidewalls of the trench; supplying healing elements to the silicon substrate to remove dangling bonds; and filling the trench with a device isolation layer, thereby forming the trench isolation without dangling bonds causing electrical charge traps.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: December 28, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chul-Sung Kim, Si-Young Choi, Jung-Woo Park, Jong-Ryol Ryu, Byeong-Chan Lee
  • Publication number: 20040082143
    Abstract: A trench isolation in a semiconductor device, and a method for fabricating the same, includes: forming a trench having inner sidewalls for device isolation in a silicon substrate; forming an oxide layer on a surface of the silicon substrate that forms the inner sidewalls of the trench; supplying healing elements to the silicon substrate to remove dangling bonds; and filling the trench with a device isolation layer, thereby forming the trench isolation without dangling bonds causing electrical charge traps.
    Type: Application
    Filed: October 16, 2003
    Publication date: April 29, 2004
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chul-Sung Kim, Si-Young Choi, Jung-Woo Park, Jong-Ryol Ryu, Byeong-Chan Lee
  • Publication number: 20040080018
    Abstract: A trench isolation in a semiconductor device, and a method for fabricating the same, includes: forming a trench having inner sidewalls for device isolation in a silicon substrate; forming an oxide layer on a surface of the silicon substrate that forms the inner sidewalls of the trench; supplying healing elements to the silicon substrate to remove dangling bonds; and filling the trench with a device isolation layer, thereby forming the trench isolation without dangling bonds causing electrical charge traps.
    Type: Application
    Filed: October 15, 2003
    Publication date: April 29, 2004
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chul-Sung Kim, Si-Young Choi, Jung-Woo Park, Jong-Ryol Ryu, Byeong-Chan Lee
  • Patent number: 6660613
    Abstract: A trench isolation in a semiconductor device, and a method for fabricating the same, includes: forming a trench having inner sidewalls for device isolation in a silicon substrate; forming an oxide layer on a surface of the silicon substrate that forms the inner sidewalls of the trench; supplying healing elements to the silicon substrate to remove dangling bonds; and filling the trench with a device isolation layer, thereby forming the trench isolation without dangling bonds causing electrical charge traps.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: December 9, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chul-Sung Kim, Si-Young Choi, Jung-Woo Park, Jong-Ryol Ryu, Byeong-Chan Lee
  • Patent number: 6562707
    Abstract: A method of forming a semiconductor device using selective epitaxial growth (SEG) is provided. This method includes forming an insulating layer pattern having a window on a semiconductor substrate. The window exposes a predetermined region of the semiconductor substrate. The substrate having the window is cleaned, thereby removing any native oxide layer on the exposed substrate. The cleaned substrate is oxidized. Accordingly, a sacrificial oxide layer is formed thereon. The sacrificial oxide layer is removed. Thus, the exposed substrate has substantially no crystalline defects. A single crystalline semiconductor layer is then grown on the exposed substrate using SEG.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: May 13, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Ryol Ryu, Jung-Woo Park, Jung-Min Ha, Si-Young Choi
  • Publication number: 20030045070
    Abstract: A trench isolation in a semiconductor device, and a method for fabricating the same, includes: forming a trench having inner sidewalls for device isolation in a silicon substrate; forming an oxide layer on a surface of the silicon substrate that forms the inner sidewalls of the trench; supplying healing elements to the silicon substrate to remove dangling bonds; and filling the trench with a device isolation layer, thereby forming the trench isolation without dangling bonds causing electrical charge traps.
    Type: Application
    Filed: March 22, 2002
    Publication date: March 6, 2003
    Inventors: Chul-Sung Kim, Si-Young Choi, Jung-Woo Park, Jong-Ryol Ryu, Byeong-Chan Lee
  • Publication number: 20020146888
    Abstract: A method of forming a semiconductor device using selective epitaxial growth (SEG) is provided. This method includes forming an insulating layer pattern having a window on a semiconductor substrate. The window exposes a predetermined region of the semiconductor substrate. The substrate having the window is cleaned, thereby removing any native oxide layer on the exposed substrate. The cleaned substrate is oxidized. Accordingly, a sacrificial oxide layer is formed thereon. The sacrificial oxide layer is removed. Thus, the exposed substrate has substantially no crystalline defects. A single crystalline semiconductor layer is then grown on the exposed substrate using SEG.
    Type: Application
    Filed: January 10, 2002
    Publication date: October 10, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jong-Ryol Ryu, Jung-Woo Park, Jung-Min Ha, Si-Young Choi