Patents by Inventor Jong Sang Lee
Jong Sang Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200051790Abstract: A plasma processing apparatus includes a plasma chamber, an electrostatic chuck disposed in the plasma chamber and a pressure control ring disposed in the plasma chamber. The pressure control ring includes a body surrounding an electrostatic chuck in a plan view, an exhaust part disposed in a portion of the body along a first direction, the exhaust part configured to induce a flow of gas in the plasma chamber toward the first direction in a plan view, and a blocking part disposed in another portion of the body along a second direction perpendicular to the first direction in a plan view, the blocking part configured to block the flow of the gas in the second direction.Type: ApplicationFiled: January 21, 2019Publication date: February 13, 2020Inventors: Kyu-Chul SHIM, Min-Kyu KANG, Bum-Soo KIM, Yong-Soo KIM, Hee-Jung KIM, Dae-Gyu BAN, Kyoung-Soo LEE, Jong-Sang LEE, Hyo-Il CHOI
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Patent number: 9702672Abstract: Provided is a lighted nock for an arrow including: a light emitting part having a light coupled to the rear end periphery of a cylindrical battery, the light being turned on/off through forward and backward movements toward and from the battery; an arrow coupling part having an outer peripheral surface insertedly fitted to the rear end periphery of an arrow shaft in such a manner as to be coupled to the arrow shaft in a non-adhesive state, while having the battery inserted into the inner space thereof; and a light operating part inserted into the arrow coupling part, without being arbitrarily separated from the arrow coupling part in the state where the front end thereof grasps the light, and adapted to turn the light on/off through forward and backward movements toward and from the arrow coupling part.Type: GrantFiled: March 24, 2016Date of Patent: July 11, 2017Inventors: Jae Woo Kim, Jong Sang Lee
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Patent number: 9677859Abstract: A lighted arrow nock includes: a light emitting part having a light and a battery to allow the light to be moved forward and backward to and from battery to turn on and off the light; a driving circuit part disposed in the light to intermittently supply the power supplied from the battery to a light emitting diode chip of the light to allow the light to blink; an arrow coupling member having a cylindrical structure so that an outer peripheral surface thereof is inserted into the rear end of an arrow, while having the battery inserted into the inner space thereof; and a light operating member adapted to allow the light to be inserted into the lower portion thereof in the state of being inserted into the arrow coupling member and to move up and down.Type: GrantFiled: January 27, 2016Date of Patent: June 13, 2017Inventors: Jae Woo Kim, Jong Sang Lee
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Publication number: 20170153094Abstract: A lighted arrow nock includes: a light emitting part having a light and a battery to allow the light to be moved forward and backward to and from battery to turn on and off the light; a driving circuit part disposed in the light to intermittently supply the power supplied from the battery to a light emitting diode chip of the light to allow the light to blink; an arrow coupling member having a cylindrical structure so that an outer peripheral surface thereof is inserted into the rear end of an arrow, while having the battery inserted into the inner space thereof; and a light operating member adapted to allow the light to be inserted into the lower portion thereof in the state of being inserted into the arrow coupling member and to move up and down.Type: ApplicationFiled: January 27, 2016Publication date: June 1, 2017Inventors: Jae Woo KIM, Jong Sang LEE
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Patent number: 9336893Abstract: A non-volatile memory device includes a sector pass/fail indicator circuit configured to store a pass/fail indicator for each sector in a first block of memory cells. The pass/fail indicator has a first value indicating the respective sector has failed erase verification and has a second value indicating the respective sector has passed erase verification. The sector pass/fail indicator circuit set the respective pass/fail indicators to the second value for one or more sectors in the first block after the respective sectors pass erase verification following a previous block erase operation of the first block. The first block is subjected to subsequent block erase operation where only word lines associated with the sectors having a pass/fail indicator having the first value are biased to the first bias voltage level.Type: GrantFiled: July 1, 2015Date of Patent: May 10, 2016Assignee: Integrated Silicon Solution, Inc.Inventors: Jong Sang Lee, Hounien Chen, Kyoung Chon Jin
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Publication number: 20150380101Abstract: A non-volatile memory device includes a sector pass/fail indicator circuit configured to store a pass/fail indicator for each sector in a first block of memory cells. The pass/fail indicator has a first value indicating the respective sector has failed erase verification and has a second value indicating the respective sector has passed erase verification. The sector pass/fail indicator circuit set the respective pass/fail indicators to the second value for one or more sectors in the first block after the respective sectors pass erase verification following a previous block erase operation of the first block. The first block is subjected to subsequent block erase operation where only word lines associated with the sectors having a pass/fail indicator having the first value are biased to the first bias voltage level.Type: ApplicationFiled: July 1, 2015Publication date: December 31, 2015Inventors: Jong Sang Lee, Hounien Chen, Kyoung Chon Jin
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Publication number: 20150221388Abstract: A non-volatile memory device includes a control circuit configured to perform a block erase operation including a block erase cycle and an erase verify cycle on a block of memory cells. The control circuit is configured to perform the erase verify cycle by storing a last verify address for each sector of the block of memory cells, verifying each memory cell in a sector starting from the last verify address for the sector until a memory cell has failed erase verification in that sector, storing the memory cell address of the failed memory cell as the last verify address for that sector, skipping the erase verification for the remaining memory cells in that sector, and continuing the erase verify cycle at a last verify address for the next sector.Type: ApplicationFiled: February 6, 2014Publication date: August 6, 2015Applicant: Integrated Silicon Solution, Inc.Inventors: Jong Sang Lee, Kyoung Chon Jin
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Patent number: 9099192Abstract: A non-volatile memory device includes a sector pass/fail indicator circuit configured to store a pass/fail indicator for each sector in a first block of memory cells. The pass/fail indicator has a first value indicating the respective sector has failed erase verification and has a second value indicating the respective sector has passed erase verification. The sector pass/fail indicator circuit set the respective pass/fail indicators to the second value for one or more sectors in the first block after the respective sectors pass erase verification following a previous block erase operation of the first block. The first block is subjected to subsequent block erase operation where only word lines associated with the sectors having a pass/fail indicator having the first value are biased to the first bias voltage level.Type: GrantFiled: January 13, 2014Date of Patent: August 4, 2015Assignee: Integrated Silicon Solution, Inc.Inventors: Jong Sang Lee, Hounien Chen, Kyoung Chon Jin
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Publication number: 20150200018Abstract: A non-volatile memory device includes a sector pass/fail indicator circuit configured to store a pass/fail indicator for each sector in a first block of memory cells. The pass/fail indicator has a first value indicating the respective sector has failed erase verification and has a second value indicating the respective sector has passed erase verification. The sector pass/fail indicator circuit set the respective pass/fail indicators to the second value for one or more sectors in the first block after the respective sectors pass erase verification following a previous block erase operation of the first block. The first block is subjected to subsequent block erase operation where only word lines associated with the sectors having a pass/fail indicator having the first value are biased to the first bias voltage level.Type: ApplicationFiled: January 13, 2014Publication date: July 16, 2015Applicant: Integrated Silicon Solution, Inc.Inventors: Jong Sang Lee, Hounien Chen, Kyoung Chon Jin
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Publication number: 20090149103Abstract: A plasma display panel (PDP) and the method for manufacturing the same. A method for manufacturing a plasma display panel includes forming electrodes along one direction on a substrate, applying the dielectric paste along the other direction perpendicular to the one direction of the electrodes on the substrate, drying the dielectric paste and firing the dried dielectric paste to form a dielectric layer. Only one swath is needed for the entire dielectric layer, saving time and production costs, while providing a superior quality layer. Accordingly, since the dielectric paste is applied along the direction perpendicular to the longitudinal direction of the display electrodes, it is advantage that tack time and the number of cleaning the nozzle is reduced.Type: ApplicationFiled: December 15, 2008Publication date: June 11, 2009Inventors: Byung-Kwan Song, Jong-Sang Lee, Cheol-Hee Moon
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Patent number: 7479050Abstract: A plasma display panel (PDP) and the method for manufacturing the same. A method for manufacturing a plasma display panel includes forming electrodes along one direction on a substrate, applying the dielectric paste along the other direction perpendicular to the one direction of the electrodes on the substrate, drying the dielectric paste and firing the dried dielectric paste to form a dielectric layer. Only one swath is needed for the entire dielectric layer, saving time and production costs, while providing a superior quality layer. Accordingly, since the dielectric paste is applied along the direction perpendicular to the longitudinal direction of the display electrodes, it is advantage that tack time and the number of cleaning the nozzle is reduced.Type: GrantFiled: November 19, 2004Date of Patent: January 20, 2009Assignee: Samsung SDI Co., Ltd.Inventors: Byung-Kwan Song, Jong-Sang Lee, Cheol-Hee Moon
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Publication number: 20080203889Abstract: A phosphor layer having improved contrast and brightness characteristics and a display device including the same are provided. The phosphor layer is made out of an ultra-fine pigment, a dispersant, a phosphor, a photosensitizer and a binder. The phosphor has a uniform distribution along the thickness of the phosphor layer, and the pigment varies in content over the thickness of the phosphor layer. A method of forming the phosphor layer is based on existing phosphor layer processes and includes a reduced number of processing steps than a filter screen method, thereby markedly lowering the manufacturing costs. The phosphor layer can be used in a cathode ray tube, a plasma display panel, a field emission display, and an organic electroluminescent device.Type: ApplicationFiled: February 28, 2008Publication date: August 28, 2008Inventors: Byung-Heun Kang, Jong-Sang Lee, Jac-Hong Lim, Seok-Hwan Cha, Hong-Kyu Choi
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Patent number: 7361417Abstract: A phosphor layer having improved contrast and brightness characteristics and a display device including the same are provided. The phosphor layer is made out of an ultra-fine pigment, a dispersant, a phosphor, a photosensitizer and a binder. The phosphor has a uniform distribution along the thickness of the phosphor layer, and the pigment varies in content over the thickness of the phosphor layer. A method of forming the phosphor layer is based on existing phosphor layer processes and includes a reduced number of processing steps than a filter screen method, thereby markedly lowering the manufacturing costs. The phosphor layer can be used in a cathode ray tube, a plasma display panel, a field emission display, and an organic electroluminescent device.Type: GrantFiled: May 4, 2004Date of Patent: April 22, 2008Assignee: Samsung SDI Co., Ltd.Inventors: Byung-Heun Kang, Jong-Sang Lee, Jae-Hong Lim, Seok-Hwan Cha, Hong-Kyu Choi
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Patent number: 7220653Abstract: A manufacturing method of a plasma display panel and the plasma display panel made using the manufacturing method include the align marks being maintained in a discernible state. The method for manufacturing a plasma display panel includes forming electrodes on a substrate along one direction, and forming align marks on edges of the substrate, depositing a dielectric paste on the substrate covering the align marks, drying the dielectric paste, and baking the dielectric paste to thereby form a dielectric layer. The align marks are left fully remaining such that they are easily discernible, thereby making sealing and other processes easy.Type: GrantFiled: November 29, 2004Date of Patent: May 22, 2007Assignee: Samsung SDI Co., Ltd.Inventors: Jong-Sang Lee, Byung-Kwan Song, Jin-Beyung Lee, Cheol-Hee Moon, Chang-Seok Rho
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Publication number: 20050206316Abstract: There is provided a plasma display panel having an improved dielectric layer and a method of manufacturing the plasma display panel. The method of manufacturing the plasma display panel comprises the steps of: forming electrodes in a direction on a substrate; cleaning the substrate on which the electrodes are formed; coating the substrate with dielectric paste; drying the dielectric paste; and firing the dielectric paste and forming a dielectric layer having a single layer. Accordingly, it is possible to form a dielectric layer for a plasma display panel having reduced bubbles and an excellent transmittance.Type: ApplicationFiled: January 24, 2005Publication date: September 22, 2005Inventors: Jong-Sang Lee, Byung-Kwan Song, Jin-Beyung Lee, Cheol-Hee Moon, Chang-Seok Rho
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Publication number: 20050148151Abstract: A manufacturing method of a plasma display panel and the plasma display panel made using the manufacturing method include the align marks being maintained in a discernible state. The method for manufacturing a plasma display panel includes forming electrodes on a substrate along one direction, and forming align marks on edges of the substrate, depositing a dielectric paste on the substrate covering the align marks, drying the dielectric paste, and baking the dielectric paste to thereby form a dielectric layer. The align marks are left fully remaining such that they are easily discernible, thereby making sealing and other processes easy.Type: ApplicationFiled: November 29, 2004Publication date: July 7, 2005Inventors: Jong-Sang Lee, Byung-Kwan Song, Jin-Beyung Lee, Cheol-Hee Moon, Chang-Seok Rho
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Publication number: 20050116648Abstract: A plasma display panel (PDP) and the method for manufacturing the same. A method for manufacturing a plasma display panel includes forming electrodes along one direction on a substrate, applying the dielectric paste along the other direction perpendicular to the one direction of the electrodes on the substrate, drying the dielectric paste and firing the dried dielectric paste to form a dielectric layer. Only one swath is needed for the entire dielectric layer, saving time and production costs, while providing a superior quality layer. Accordingly, since the dielectric paste is applied along the direction perpendicular to the longitudinal direction of the display electrodes, it is advantage that tack time and the number of cleaning the nozzle is reduced.Type: ApplicationFiled: November 19, 2004Publication date: June 2, 2005Inventors: Byung-Kwan Song, Jong-Sang Lee, Cheol-Hee Moon
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Publication number: 20040224187Abstract: A phosphor layer having improved contrast and brightness characteristics and a display device including the same are provided. The phosphor layer is made out of an ultra-fine pigment, a dispersant, a phosphor, a photosensitizer and a binder. The phosphor has a uniform distribution along the thickness of the phosphor layer, and the pigment varies in content over the thickness of the phosphor layer. A method of forming the phosphor layer is based on existing phosphor layer processes and includes a reduced number of processing steps than a filter screen method, thereby markedly lowering the manufacturing costs. The phosphor layer can be used in a cathode ray tube, a plasma display panel, a field emission display, and an organic electroluminescent device.Type: ApplicationFiled: May 4, 2004Publication date: November 11, 2004Inventors: Byung-Heun Kang, Jong-Sang Lee, Jae-Hong Lim, Seok-Hwan Cha, Hong-Kyu Choi
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Publication number: 20030137233Abstract: A monochrome cathode ray tube, and method of manufacture, including a face panel having a screen portion on which a single color phosphor screen is formed, and the phosphor screen being formed corresponding to an effective viewing area of an outer surface of the face panel. The cathode ray tube may further include a funnel including a neck and connected to the face panel, an electron gun mounted within the neck and emitting an electron beam, and a deflection yoke mounted on the funnel.Type: ApplicationFiled: December 30, 2002Publication date: July 24, 2003Applicant: SAMSUNG SDI CO., LTD.Inventors: Jong-Sang Lee, Hwan-Chul Rho, IL-Hoon Kim, Chong-In Chung, Chul-Han Bae
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Patent number: 6377487Abstract: A flash memory device comprises a bank register for selecting the program/erase state of each of the banks, a mode controller for outputting the mode signal of the bank selected by the bank register, an address controller for independently separating an external address into an internal address depending on the output from the bank register, and a plurality of banks for simultaneously performing the program/erase operation and the read-out operation, depending on the mode signal and the internal address.Type: GrantFiled: November 28, 2000Date of Patent: April 23, 2002Assignee: Hyundai Electronics Industries Co., Ltd.Inventor: Jong Sang Lee