Abstract: An active air flap and electric thermostat integration control method for a vehicle may include a first control step of controlling opening and closing of an active air flap (AAF) depending on whether the vehicle starts-up, a second control step of controlling opening and closing of an electric thermostat (ETS) and the opening and closing of the AAF according to an engine temperature, a third control step of controlling the opening and closing of the ETS and the opening and closing of the AAF according to an engine load, a fourth control step of controlling the opening and closing of the ETS and the opening and closing of the AAF depending on whether a brake is operated, and a fifth control step, by the ECU, of controlling the opening and closing of the ETS and the opening and closing of the AAF according to a coolant temperature.

Abstract: An active air flap and electric thermostat integration control method for a vehicle may include a first control step of controlling opening and closing of an active air flap (AAF) depending on whether the vehicle starts-up, a second control step of controlling opening and closing of an electric thermostat (ETS) and the opening and closing of the AAF according to an engine temperature, a third control step of controlling the opening and closing of the ETS and the opening and closing of the AAF according to an engine load, a fourth control step of controlling the opening and closing of the ETS and the opening and closing of the AAF depending on whether a brake is operated, and a fifth control step, by the ECU, of controlling the opening and closing of the ETS and the opening and closing of the AAF according to a coolant temperature.

Abstract: Disclosed is a flue gas absorbent composition which contains a compound and water. The compound has a ring structure and includes terminal primary amine groups and substituted ?-carbon atoms neighboring the amine groups. Further, a use of a solution of a compound having a ring structure and terminal amine groups as a flue gas absorbent is disclosed. The absorbent composition includes a ring-structure compound having superior absorption ability when compared to conventional absorbents, thereby exhibiting excellent properties, i.e., flue gas absorption rate improved by 50 to 100% and flue gas absorption capacity improved by 200 to 400%, as compared with currently used absorbents such as monoethanolamine (MEA) and 2-amino-2-methyl-propanol (AMP).

Abstract: Provided are hydrophobic layer formed by polymer represented by Formula 1 below and has a weight average molecular weight of about 10,000 to about 500,000 g/mol, hydrophobic layer including the polymer and an electronic articles including the hydrophobic layer: wherein Q1, and Q2 are independently linear or branched C1-C10 alkylene groups, R1 and R2 are independently ether and/or ester containing substituents, R3 to R7 are independently selected from a hydrogen atom, a halogen atom, a cyano group, an amino group, a C1-C10 alkyl group and a C6-C12 aryl group; and the ratio of a:b+c is from 10:1 to 1:1,000. A coated electronic article comprising the hydrophobic layer and a method of forming the coated electronic article are also provided.

Abstract: Methods of manufacturing a semiconductor device having an RCAT are provided. The method includes forming a first recess having a first depth formed in an active region of a semiconductor substrate, and a second recess having a second depth that is less than the first depth formed in an isolation layer. The depth of the second recess is decreased by removing the isolation layer from the upper surface of the isolation layer by a desired thickness. A gate dielectric layer is formed on an inner wall of the first recess and a gate is formed on the gate dielectric layer.

Abstract: Disclosed is a flue gas absorbent composition which contains a compound and water. The compound has a ring structure and includes terminal primary amine groups and substituted ?-carbon atoms neighboring the amine groups. Further, a use of a solution of a compound having a ring structure and terminal amine groups as a flue gas absorbent is disclosed. The absorbent composition includes a ring-structure compound having superior absorption ability when compared to conventional absorbents, thereby exhibiting excellent properties, i.e., flue gas absorption rate improved by 50 to 100% and flue gas absorption capacity improved by 200 to 400%, as compared with currently used absorbents such as monoethanolamine (MEA) and 2-amino-2-methyl-propanol (AMP).

Abstract: A semiconductor memory device includes unit active regions, word lines extending in a first direction over the unit active region, bit lines extending on the word lines in a second direction substantially perpendicularly to the first direction, first pad contacts in contact with central portions of the unit active regions, the first pad contacts being arranged between the word lines, direct contacts electrically connected between the first pad contacts and the bit lines, second pad contacts in contact with edge portions of the unit active regions, the second pad contacts being arranged between the word lines and between the bit lines, buried contacts electrically connected to the second pad contacts, and capacitors electrically connected to the buried contacts.

Abstract: In an embodiment, a semiconductor device includes a first fuse cutting portion in which fuse lines are arranged transversely adjacent to each other, a first runner portion in which runner lines connected to the fuse lines are arranged transversely adjacent to each other but at smaller intervals than those of the fuse lines, and a first connection portion having connection lines between the fuse lines and the runner lines. An insulating barrier layer covers the connection portions so that post-process residues from fuse cutting do not cause electrical shorts between the closely formed runner lines.

Abstract: Methods of manufacturing a semiconductor device having an RCAT are provided. The method includes forming a first recess having a first depth formed in an active region of a semiconductor substrate, and a second recess having a second depth that is less than the first depth formed in an isolation layer. The depth of the second recess is decreased by removing the isolation layer from the upper surface of the isolation layer by a desired thickness. A gate dielectric layer is formed on an inner wall of the first recess and a gate is formed on the gate dielectric layer.

Abstract: Provided are hydrophobic layer formed by polymer represented by Formula 1 below and has a weight average molecular weight of about 10,000 to about 500,000 g/mol, hydrophobic layer including the polymer and an electronic articles including the hydrophobic layer: wherein Q1, and Q2 are independently linear or branched C1-C10 alkylene groups, R1 and R2 are independently ether and/or ester containing substituents, R3 to R7 are independently selected from a hydrogen atom, a halogen atom, a cyano group, an amino group, a C1-C10 alkyl group and a C6-C12 aryl group; and the ratio of a:b+c is from 10:1 to 1:1,000. A coated electronic article comprising the hydrophobic layer and a method of forming the coated electronic article are also provided.

Abstract: In a semiconductor device having a capacitor and a method of fabricating the same, the semiconductor device comprises a semiconductor substrate having a memory cell array region and a peripheral region, a plurality of capacitors in the memory cell array region each having a storage electrode, a dielectric layer on the storage electrode, and a plate electrode on the dielectric layer, wherein an extended portion of the plate electrode extends in a direction toward the peripheral region, a dummy pattern in the peripheral region at an elevation above the semiconductor substrate that is substantially the same as that of the extended portion of the plate electrode and spaced apart from the extended portion of the plate electrode, an insulating layer formed on the plurality of capacitors in the cell array region and formed on the dummy pattern in the peripheral region, a first metal contact through the insulating layer between the extended portion of the plate electrode and the dummy pattern.

Abstract: A fuse structure of a semiconductor memory device may include a substrate including a fuse region, an insulation layer pattern having a multi-layered structure, and/or a plurality of fuse lines. The plurality of fuse lines may pass through an inner space of an opening portion of the insulation layer pattern having the multi-layered structure that exposes the fuse region and may be spaced apart from a surface of the fuse region.

Abstract: In an embodiment, a semiconductor device includes a first fuse cutting portion in which fuse lines are arranged transversely adjacent to each other, a first runner portion in which runner lines connected to the fuse lines are arranged transversely adjacent to each other but at smaller intervals than those of the fuse lines, and a first connection portion having connection lines between the fuse lines and the runner lines. An insulating barrier layer covers the connection portions so that post-process residues from fuse cutting do not cause electrical shorts between the closely formed runner lines.

Abstract: In a semiconductor device having a capacitor and a method of fabricating the same, the semiconductor device comprises a semiconductor substrate having a memory cell array region and a peripheral region, a plurality of capacitors in the memory cell array region each having a storage electrode, a dielectric layer on the storage electrode, and a plate electrode on the dielectric layer, wherein an extended portion of the plate electrode extends in a direction toward the peripheral region, a dummy pattern in the peripheral region at an elevation above the semiconductor substrate that is substantially the same as that of the extended portion of the plate electrode and spaced apart from the extended portion of the plate electrode, an insulating layer formed on the plurality of capacitors in the cell array region and formed on the dummy pattern in the peripheral region, a first metal contact through the insulating layer between the extended portion of the plate electrode and the dummy pattern.