Abstract: A display device includes: an electronic module; and an electronic panel including: a base layer including an upper surface having a recessed portion and a dam portion; and an alignment mark disposed on the base layer, wherein the electronic panel includes: a first area including the electronic module; a second area surrounding at least a portion of the first area in a plan view; and an active area surrounding at least a portion of the second area in a plan view, wherein: the recessed portion and the dam portion are disposed in the second area, the second area includes a pattern area surrounding the first area and a line area surrounding the pattern area, and the alignment mark includes a conductive pattern and is disposed in the pattern area.

Abstract: A display device includes: an electronic module; and an electronic panel including: a base layer including an upper surface having a recessed portion and a dam portion; and an alignment mark disposed on the base layer, wherein the electronic panel includes: a first area including the electronic module; a second area surrounding at least a portion of the first area in a plan view; and an active area surrounding at least a portion of the second area in a plan view, wherein: the recessed portion and the dam portion are disposed in the second area, the second area includes a pattern area surrounding the first area and a line area surrounding the pattern area, and the alignment mark includes a conductive pattern and are disposed in the pattern area.

Abstract: A mark substrate includes a base substrate, a light-blocking layer disposed on the base substrate, where an opening or a groove is defined in the light-blocking layer, and an infrared-transmitting member. At least a portion of the infrared-transmitting member is disposed in the opening or the groove of the light-blocking layer to define a mark having a two-dimensional shape and optically distinguished from an adjacent area.

Abstract: A display device includes: an electronic module; and an electronic panel including: a base layer including an upper surface having a recessed portion and a dam portion; and an alignment mark disposed on the base layer, wherein the electronic panel includes: a first area including the electronic module; a second area surrounding at least a portion of the first area in a plan view; and an active area surrounding at least a portion of the second area in a plan view, wherein: the recessed portion and the dam portion are disposed in the second area, the second area includes a pattern area surrounding the first area and a line area surrounding the pattern area, and the alignment mark includes a conductive pattern and are disposed in the pattern area.

Abstract: A display device includes: an electronic module; and an electronic panel including: a first area overlapping the electronic module; a second area surrounding at least a portion of the first area in a plan view; and an indicia disposed on the first area.

Abstract: A display device according to an embodiment includes a substrate, a display element layer disposed on the substrate, and a window disposed on the display element layer. The window includes a display area and a peripheral area, wherein the window includes a base layer, a print layer disposed on a side of the base layer and including an opening, a first ink layer that overlaps the opening and includes an infrared ink, and a second ink layer that overlaps the opening and includes a white ink.

Abstract: A mark substrate includes a base substrate, a light-blocking layer disposed on the base substrate, where an opening or a groove is defined in the light-blocking layer, and an infrared-transmitting member. At least a portion of the infrared-transmitting member is disposed in the opening or the groove of the light-blocking layer to define a mark having a two-dimensional shape and optically distinguished from an adjacent area.

Abstract: A display device includes: an electronic module; and an electronic panel including: a first area overlapping the electronic module; a second area surrounding at least a portion of the first area in a plan view; and an indicia disposed on the first area.

Abstract: A display apparatus including a display region including a first high pixel connected to a first gate line and a first data line, and a first low pixel connected to the first gate line and a second data line, the first high pixel being configured to represent a first high grayscale level, the first low pixel being configured to represent a first low grayscale level, a gate driver configured to apply a gate signal to the gate line, a data driver including a first output part configured to apply a data voltage to the first data line and the second data line, and a selecting part configured to alternately connect the first data line and the second data line to the first output part of the data driver.

Abstract: A gate driver includes first and second shift registers and a selector. The first shift register outputs first pulses. The second shift register outputs second pulses different from the first pulses. The selector selects one of the first pulses or the second pulses. When the selector selects the first pulses, the gate driver generates a first gate signal including first and second high periods, and output the first gate signal to a first gate line. The second high period is apart from the first high period by a first interval. When the selector selects the second pulses, the gate driver generates a second gate signal including the first high period and a third high period, and output the second gate signal to the first gate line. The third high period is apart from the first high period by a second interval different from the first interval.

Abstract: An exemplary embodiment provides a thin film transistor array panel, including: a substrate; an oxide semiconductor layer disposed on the substrate; an insulating layer disposed on the oxide semiconductor layer; and a pixel electrode disposed on the insulating layer. The oxide semiconductor layer includes a first layer and a second layer disposed on the first layer, the second layer includes an oxide semiconductor including silicon, and the second layer contacts the insulating layer.

Abstract: A liquid crystal display according to an exemplary embodiment of the present disclosure includes: a first substrate where a pixel electrode is formed; a second substrate facing the first substrate; a liquid crystal layer provided between the first substrate and the second substrate; and a driving device connected with the first substrate, wherein the first substrate includes a pixel area where pixels emit light, and a load storage area provided between the pixel area and the driving device and constantly maintaining a load applied to the pixels in the pixel area.

Abstract: A gate driver includes first and second shift registers and a selector. The first shift register outputs first pulses. The second shift register outputs second pulses different from the first pulses. The selector selects one of the first pulses or the second pulses. When the selector selects the first pulses, the gate driver generates a first gate signal including first and second high periods, and output the first gate signal to a first gate line. The second high period is apart from the first high period by a first interval. When the selector selects the second pulses, the gate driver generates a second gate signal including the first high period and a third high period, and output the second gate signal to the first gate line. The third high period is apart from the first high period by a second interval different from the first interval.

Abstract: A display apparatus including a display region including a first high pixel connected to a first gate line and a first data line, and a first low pixel connected to the first gate line and a second data line, the first high pixel being configured to represent a first high grayscale level, the first low pixel being configured to represent a first low grayscale level, a gate driver configured to apply a gate signal to the gate line, a data driver including a first output part configured to apply a data voltage to the first data line and the second data line, and a selecting part configured to alternately connect the first data line and the second data line to the first output part of the data driver.

Abstract: A display apparatus includes a display panel including a gate line disposed in a display area and extending in a first direction, a data line extending in a second direction crossing the first direction and a switching element electrically connected to the gate line and the data line. A first data driving part is electrically connected to a first peripheral area adjacent to the display area. A second data driving part is electrically connected to a second peripheral area adjacent to the first peripheral area. The display panel includes a voltage connecting line disposed between the first peripheral area and the second peripheral area. The voltage connecting line connects the first data driving part to the second data driving part.

Abstract: A liquid crystal display according to an exemplary embodiment of the present disclosure includes: a first substrate where a pixel electrode is formed; a second substrate facing the first substrate; a liquid crystal layer provided between the first substrate and the second substrate; and a driving device connected with the first substrate, wherein the first substrate includes a pixel area where pixels emit light, and a load storage area provided between the pixel area and the driving device and constantly maintaining a load applied to the pixels in the pixel area.

Abstract: An exemplary embodiment provides a thin film transistor array panel, including: a substrate; an oxide semiconductor layer disposed on the substrate; an insulating layer disposed on the oxide semiconductor layer; and a pixel electrode disposed on the insulating layer. The oxide semiconductor layer includes a first layer and a second layer disposed on the first layer, the second layer includes an oxide semiconductor including silicon, and the second layer contacts the insulating layer.

Abstract: A driving circuit including a timing control part, a driving voltage generating part, a voltage modifying part, and a slope control part. The voltage modifying part is configured to modify the gate-on voltage to a swing-on signal based on the kickback control signal, the swing-on signal including a slicing part, the slicing part including a falling portion during which a level of the swing-on signal falls from the first high level to a second high level lower than the first high level, and a rising portion during which the level of the swing-on signal rises from the second high level to the first high level. The slope control part is configured to decrease a slew rate of the rising portion in the swing-on signal and to output the swing-on signal decreased the slew rate of the rising portion as a gate-on signal.