Patents by Inventor Jong-Woon Lee

Jong-Woon Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11987174
    Abstract: A lighting device irradiating light to different locations includes a light irradiation unit that generates light; an optical path adjustment unit that adjusts a path of the light radiated from the light irradiation unit to allow a road surface pattern to be formed at a predetermined location on a road surface around a vehicle; and a driving unit that adjusts the optical path adjustment unit to allow the road surface pattern to be formed at different locations on the road surface around the vehicle.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: May 21, 2024
    Assignee: SL Corporation
    Inventors: Hye Jin Park, Jong Min Lee, Ki Hae Shin, Jong Woon Kim, Min Gi Jung
  • Publication number: 20240148923
    Abstract: A sterilization device includes a housing; a sterilization unit which emits germicidal light for sterilization of at least one target area to be sterilized; and a drive unit which moves at least a part of the sterilization unit between the outside and inside of the housing through an opening provided in the housing.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 9, 2024
    Inventors: Hyun Woo Choi, Sang Hyoung Lee, Woo Yeong Son, Jong Woon Kim, Hae Ryun Lee, Man Young Chun, Dong Hwan Sin
  • Publication number: 20240139362
    Abstract: A sterilization apparatus includes a housing; a sterilization unit for irradiating, with sterilization light, at least one region to be sterilized; and a driving unit for moving the sterilization unit into and out of the housing via an opening of the housing and rotating the sterilization unit about a rotation axis.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Inventors: Hyun Woo Choi, Sang Hyoung Lee, Jong Min Lee, Jong Woon Kim, Hae Ryun Lee, Man Young Chun, Hye Jin Park
  • Patent number: 11974503
    Abstract: Provided is a thermoelectric module. The thermoelectric module includes a thermoelectric element including a first substrate, a first electrode disposed on the first substrate, a semiconductor structure disposed on the first electrode, a second electrode disposed on the semiconductor structure, and a second substrate disposed on the second electrode, a heat sink disposed on the second substrate, and an adhesive layer configured to bond the second substrate to the heat sink. The heat sink has a shape in which predetermined patterns are regularly repeated and connected. Each pattern includes a first surface disposed opposite to the second substrate, a in second surface which extends upward from one end of the first surface, a third surface which extends from the second surface to face the second substrate, and a fourth surface which extends upward from the other end opposite to the one end of the first surface and is connected to a third surface of an adjacent pattern.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: April 30, 2024
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Jong Hyun Kim, Young Sam Yoo, Se Woon Lee
  • Publication number: 20240128123
    Abstract: A method for forming a semiconductor die, includes forming an interlayer dielectric layer on a substrate having a semiconductor die region, a seal-ring region, and a scribe line region, forming a metal pad and a test pad on the interlayer dielectric layer, forming a passivation dielectric layer on the interlayer dielectric layer, the metal pad, and the test pad, first etching the passivation dielectric layer and the interlayer dielectric layer existing between the seal-ring region and the scribe line region to a predetermined depth using a plasma etching process, second etching the passivation dielectric layer to expose the metal pad and the test pad, forming a bump on the metal pad, and dicing the substrate while removing the scribe line region by mechanical sawing.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 18, 2024
    Applicant: MagnaChip Semiconductor, Ltd.
    Inventors: Jin Won JEONG, Jang Hee LEE, Young Hun JUN, Jong Woon LEE, Jae Sik CHOI
  • Patent number: 11946610
    Abstract: A vehicle lamp for emitting light at various locations adjacent to a vehicle while having a simplified configuration is provided. A vehicle lamp includes a light-emitting unit that emits light to form a road surface pattern, and a movable unit on which the light-emitting unit is mounted. The light generated by the light-emitting unit enables the road surface pattern to be formed on different locations of a road surface adjacent to the vehicle as the movable unit rotates.
    Type: Grant
    Filed: February 17, 2023
    Date of Patent: April 2, 2024
    Assignee: SL Corporation
    Inventors: Jong Min Lee, Jong Woon Kim, Hye Jin Park
  • Patent number: 11887892
    Abstract: A method for forming a semiconductor die, includes forming an interlayer dielectric layer on a substrate having a semiconductor die region, a seal-ring region, and a scribe line region, forming a metal pad and a test pad on the interlayer dielectric layer, forming a passivation dielectric layer on the interlayer dielectric layer, the metal pad, and the test pad, first etching the passivation dielectric layer and the interlayer dielectric layer existing between the seal-ring region and the scribe line region to a predetermined depth using a plasma etching process, second etching the passivation dielectric layer to expose the metal pad and the test pad, forming a bump on the metal pad, and dicing the substrate while removing the scribe line region by mechanical sawing.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: January 30, 2024
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Jin Won Jeong, Jang Hee Lee, Young Hun Jun, Jong Woon Lee, Jae Sik Choi
  • Publication number: 20220005733
    Abstract: A method for forming a semiconductor die, includes forming an interlayer dielectric layer on a substrate having a semiconductor die region, a seal-ring region, and a scribe line region, forming a metal pad and a test pad on the interlayer dielectric layer, forming a passivation dielectric layer on the interlayer dielectric layer, the metal pad, and the test pad, first etching the passivation dielectric layer and the interlayer dielectric layer existing between the seal-ring region and the scribe line region to a predetermined depth using a plasma etching process, second etching the passivation dielectric layer to expose the metal pad and the test pad, forming a bump on the metal pad, and dicing the substrate while removing the scribe line region by mechanical sawing.
    Type: Application
    Filed: April 15, 2021
    Publication date: January 6, 2022
    Applicant: MagnaChip Semiconductor, Ltd.
    Inventors: Jin Won JEONG, Jang Hee LEE, Young Hun JUN, Jong Woon LEE, Jae Sik CHOI
  • Patent number: 10535575
    Abstract: An interposer includes a substrate having a mounting area and a test area, first conductive plugs separate from each other, the first conductive plugs being disposed along a first direction and into the test area of the substrate, a first line pattern group including first non-conductive patterns disposed on first centers of the first conductive plugs, and first conductive patterns disposed to bridge first peripheries of a first adjacent pair of the first conductive plugs, and first pads connected to the first conductive patterns at both first ends of the first line pattern group.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: January 14, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shaofeng Ding, Kyoung-woo Lee, In-hwan Kim, Jong-woon Lee
  • Publication number: 20190131194
    Abstract: An interposer includes a substrate having a mounting area and a test area, first conductive plugs separate from each other, the first conductive plugs being disposed along a first direction and into the test area of the substrate, a first line pattern group including first non-conductive patterns disposed on first centers of the first conductive plugs, and first conductive patterns disposed to bridge first peripheries of a first adjacent pair of the first conductive plugs, and first pads connected to the first conductive patterns at both first ends of the first line pattern group.
    Type: Application
    Filed: June 4, 2018
    Publication date: May 2, 2019
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shaofeng DING, Kyoung-woo LEE, In-hwan KIM, Jong-woon LEE
  • Patent number: 9373602
    Abstract: According to example embodiments, a wire structure includes a first wire that includes a first wire core and a first carbon shell surrounding the first wire core, and a second wire that extends in a longitudinal direction from the first wire. The first wire core has a wire shape. The first carbon shell contains carbon.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: June 21, 2016
    Assignees: Samsung Electronics Co., Ltd., Sungkyunkwan University Foundation for Corporate Collaboration
    Inventors: Eun-kyung Lee, Byoung-lyong Choi, Won-Jae Joo, Byung-Sung Kim, Jae-Hyun Lee, Jong-Woon Lee, Dong-Mok Whang
  • Publication number: 20150061161
    Abstract: According to example embodiments, a wire structure includes a first wire that includes a first wire core and a first carbon shell surrounding the first wire core, and a second wire that extends in a longitudinal direction from the first wire. The first wire core has a wire shape. The first carbon shell contains carbon.
    Type: Application
    Filed: August 25, 2014
    Publication date: March 5, 2015
    Applicant: Sungkyunkwan University Foundation for Corporate Collaboration
    Inventors: Eun-kyung LEE, Byoung-lyong CHOI, Won-Jae JOO, Byung-Sung KIM, Jae-Hyun LEE, Jong-Woon LEE, Dong-Mok WHANG
  • Publication number: 20110297202
    Abstract: A thermoelectric material including: a nanostructure; a discontinuous area disposed in the nanostructure, and an uneven portion disposed on the nano structure.
    Type: Application
    Filed: May 24, 2011
    Publication date: December 8, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun-kyung LEE, Byoung-lyong CHOI, Jun-ho LEE, Dong-mok WHANG, Jong-woon LEE
  • Publication number: 20110132002
    Abstract: A core-shell nanowire with an uneven surface structure can be advantageously used in thermoelectric devices. The core-shell nanowire with the uneven surface structure includes a core region and a shell region, wherein the uneven surface structure is formed in the shell region.
    Type: Application
    Filed: November 30, 2010
    Publication date: June 9, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventors: Eun-kyung LEE, Byoung-lyong CHOI, Dongmok WHANG, Sang-jin LEE, Jong-woon LEE
  • Publication number: 20060023477
    Abstract: An electronic apparatus includes a main power supply including a main transformer and a first switching controller that switches an input power supply of the main transformer, and a standby power supply including an auxiliary transformer, a second switching controller that switches an input power supply of the auxiliary transformer, a rectifying circuit that converts an output voltage of the auxiliary transformer into a DC voltage and supplies the DC voltage as a driving power for the first switching controller, a transistor that switches a supply of the driving power from the rectifying circuit to the first switching controller, and a controller that switches the transistor. The electronic apparatus includes a semiconductor device that performs the switching operation with improved stability.
    Type: Application
    Filed: July 19, 2005
    Publication date: February 2, 2006
    Inventor: Jong-woon Lee
  • Patent number: 5917715
    Abstract: A forward converter having an improved power factor and suppressing a harmonic noise component appearing at an input current waveform. The forward converter includes a bridge diode, a first smoothing capacitor, a control circuit, a switching element, a transformer, a waveform shaper, a rectifying element, and a second smoothing capacitor. The bridge diode full-wave rectifies an AC input voltage to generate a first DC voltage. The first smoothing capacitor smooths the first DC voltage to generate a second DC voltage. The control circuit generates a switching control signal in response to an input of the second DC voltage. The switching element, which is connected between the first smoothing capacitor and a ground terminal, switches on or off in response to the switching control signal. The transformer, having a primary winding and a secondary winding, receives the second DC voltage through the primary winding when the switching element is switched on, and induces the second DC voltage to the secondary winding.
    Type: Grant
    Filed: October 28, 1997
    Date of Patent: June 29, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jong-Woon Lee
  • Patent number: RE49922
    Abstract: An organic light emitting display device is disclosed. One inventive aspect includes a plurality of pixels provided at a region sectioned by scan lines and data lines and an initialization power unit. The plurality of pixels are configured to control the amount of a current flowing from a first power source to a second power source through an organic light emitting diode in response to a data signal. The initialization power unit supplies initialization power to a driving transistor within each pixel circuit. The initialization power unit further controls the voltage of the initialization power supply to maintain a substantially constant voltage difference between the second power source and the initialization power.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: April 16, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sang-Hyun Lee, Jong-Woon Kim