Abstract: A surface mount semiconductor package having a novel lead configuration which facilitates a higher packing density than presently available semiconductor packages. More particularly, the package includes a plurality of electrical leads each having a laterally outwardly extending portion, a downwardly extending portion depending from an inner distal end of the laterally extending portion, and a foot portion extending laterally inwardly from a lower distal end of the downwardly extending portion. A semiconductor chip is mounted, preferably by adhesive means such as insulating tape, to the foot portion of the leads. A plurality of electrical wires are connected between an upper surface of the chip and the laterally outwardly extending portion of respective ones of the leads. A protective body, such as a molded resin body, encapsulates the chip, the wires, the laterally outwardly and downwardly extending portions of the leads.

Abstract: A semiconductor device which includes a semiconductor integrated circuit chip provided with a plurality of chip bonding pads contiguous with the peripheral edge of the chip, and a plurality of leads directly bonded to respective ones of the chip bonding pads. The bonding pads are preferably formed within respective notches disposed in a marginal edge portion of the chip, with each of the notches having an open end formed in the peripheral edge of the chip. By locating the chip bonding pads contiguous with the peripheral edge of the chip, rather than a prescribed distance away from the peripheral edge of the chip, the bonding pads are directly accessible from the edge of the chip, thereby enabling the leads to be directly bonded to the bonding pads, and thus eliminating the need for bonding bumps or balls.