Patents by Inventor Jong-Yun Myung

Jong-Yun Myung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9159688
    Abstract: A semiconductor device includes a bonding pad on a semiconductor substrate, a bump on the bonding pad, a solder on the bump, and an anti-wetting layer between the bump and the solder extending along a sidewall of the bump, the anti-wetting layer having a first thickness T1 along the sidewall of the bump closer to the solder and a second thickness T2 along the sidewall of the bump closer to the bonding pad, wherein T2<T1.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: October 13, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Yun Myung, Yonghwan Kwon
  • Patent number: 8922008
    Abstract: A bump structure includes a first bump and a second bump. The first bump is disposed on a connection pad of a substrate. The first bump includes a lower portion having a first width, a middle portion having a second width smaller than the first width, and an upper portion having a third width greater than the second width. The second bump is disposed on the upper portion of the first bump.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 30, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Yun Myung, Yong-Hwan Kwon, Jong-Bo Shim, Moon-Gi Cho
  • Publication number: 20140217580
    Abstract: A semiconductor device includes a bonding pad on a semiconductor substrate, a bump on the bonding pad, a solder on the bump, and an anti-wetting layer between the bump and the solder extending along a sidewall of the bump, the anti-wetting layer having a first thickness T1 along the sidewall of the bump closer to the solder and a second thickness T2 along the sidewall of the bump closer to the bonding pad, wherein T2<T1.
    Type: Application
    Filed: February 3, 2014
    Publication date: August 7, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jong Yun MYUNG, Yonghwan KWON
  • Publication number: 20130292822
    Abstract: A bump structure includes a first bump and a second bump. The first bump is disposed on a connection pad of a substrate. The first bump includes a lower portion having a first width, a middle portion having a second width smaller than the first width, and an upper portion having a third width greater than the second width. The second bump is disposed on the upper portion of the first bump.
    Type: Application
    Filed: March 15, 2013
    Publication date: November 7, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventors: Jong-Yun MYUNG, Yong-Hwan KWON, Jong-Bo SHIM, Moon-Gi CHO
  • Patent number: 8563349
    Abstract: A method of forming a semiconductor device includes preparing a semiconductor substrate having a plurality of chips formed thereon and a scribe lane disposed between the chips, simultaneously forming a groove having a first depth in the scribe lane, and a through hole penetrating the chips and having a second depth. The chips are separated along the groove. The first depth is smaller than the second depth.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: October 22, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Yun Myung, Hyuek-Jae Lee, Ji-Sun Hong, Tae-Je Cho, Un-Byoung Kang, Hyung-Sun Jang, Eun-Mi Kim, Jung-Hwan Kim, Tae-Hong Min
  • Patent number: 8304288
    Abstract: A method of packaging a semiconductor device may include providing a semiconductor substrate including first and second spaced apart semiconductor chip areas, and adhering a cover on the first and second spaced apart semiconductor chip areas of the semiconductor substrate. A scribe line may be formed through the semiconductor substrate between the first and second semiconductor chip areas with a semiconductor bridge pattern remaining connected between the first and second spaced apart semiconductor chip areas after forming the scribe line. The cover and the semiconductor bridge pattern may then be cut after forming the scribe line.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: November 6, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyuek-Jae Lee, Ji-Sun Hong, Tae-Je Cho, Jong-Yun Myung, Young-Bok Kim, Hyung-Sun Jang, Eun-Mi Kim
  • Publication number: 20120156823
    Abstract: A method of forming a semiconductor device includes preparing a semiconductor substrate having a plurality of chips formed thereon and a scribe lane disposed between the chips, simultaneously forming a groove having a first depth in the scribe lane, and a through hole penetrating the chips and having a second depth. The chips are separated along the groove. The first depth is smaller than the second depth.
    Type: Application
    Filed: October 26, 2011
    Publication date: June 21, 2012
    Inventors: Jong-Yun MYUNG, Hyuek-Jae Lee, Ji-Sun Hong, Tae-Je Cho, Un-Byoung Kang, Hyung-Sun Jang, Eun-Mi Kim, Jung-Hwan Kim, Tae-Hong Min
  • Publication number: 20110306167
    Abstract: A method of packaging a semiconductor device may include providing a semiconductor substrate including first and second spaced apart semiconductor chip areas, and adhering a cover on the first and second spaced apart semiconductor chip areas of the semiconductor substrate. A scribe line may be formed through the semiconductor substrate between the first and second semiconductor chip areas with a semiconductor bridge pattern remaining connected between the first and second spaced apart semiconductor chip areas after forming the scribe line. The cover and the semiconductor bridge pattern may then be cut after forming the scribe line.
    Type: Application
    Filed: June 8, 2011
    Publication date: December 15, 2011
    Inventors: Hyuek-Jae Lee, Ji-Sun Hong, Tae-je Cho, Jong-Yun Myung, Young-Bok Kim, Hyung-Sun Jang, Eun-Mi Kim