Abstract: A method and apparatus for dynamically modifying filter characteristics of a Delta-Sigma modulator to accommodate for Doppler shift. A transceiver in a wireless cellular communication system for adapt to changes in the RF carrier frequency for maintaining signal integrity by applying a pilot tone in calibration to determine a frequency shift response for a bandpass filter. During operation, the system is operative to determine a Doppler shift and to shift the bandpass filter in response.

Abstract: A method and apparatus for dynamically modifying filter characteristics of a Delta-Sigma modulator. The system is used for wide bandwidth radio system designed to adapt to various global radio standards and, more particularly, to a cellular radio architecture that employs a combination of a single circulator, programmable band-pass sampling radio frequency (RF) front-end and optimized digital baseband that is capable of supporting all current cellular wireless access protocol frequency bands.

Abstract: A wide bandwidth radio system designed to adapt to various global radio standards and, more particularly, to a radio receiver composed of a demodulator operative to work in a delta sigma mode and a Nyquist mode, and wherein a filter and feedback loop may utilized in response to the modulation mode of an RF signal.

Abstract: A multi-port active circulator where each of a plurality of FET transistors has (i) a gate connected to an associated port of the multi-port active circulator via a capacitor of an associated one of a plurality of first RF chokes, each of the first RF chokes being connected to a gate of an associated FET transistor of said plurality of transistors, the associated port of said associated FET transistor and to a power supply bias connection; (ii) a source connected to a common point; and (iii) a drain connected to the gate of the same FET transistor by a feedback circuit and connected to the gate of a neighboring FET transistor via a capacitor of one of a plurality of second RF chokes, each of which coupling gates and drains of neighboring FET transistors via capacitors thereof and being connected to another power supply bias connection.

Abstract: A neuroelectric sensor and stimulator system includes a first antenna, a reader coupled to the first antenna for transmitting stimulation controls and power to a second antenna, and for receiving sensor data transmitted from the second antenna via the first antenna, and at least one neuroelectric sensor stimulator array including the second antenna, a rectifier coupled to the second antenna for extracting power transmitted from the first antenna, a controller coupled to the second antenna for decoding controls transmitted from the first antenna to the second antenna for the neuroelectric sensor stimulator array, a plurality of sensors, a multiplexer coupled to the controller and to the plurality of sensors for selecting a single sensor, and a plurality of stimulators coupled to the controller for stimulating neurons, wherein the rectifier, the controller, the plurality of sensors, the multiplexer, and the plurality of stimulators include graphene.

Abstract: In an illustrative example, a device includes an operational amplifier of an active bandpass filter circuit. The device further includes an adjustable resistance device configured to adjust a center frequency associated with the active bandpass filter circuit. The device further includes an adjustable capacitance device configured to adjust the center frequency and a bandwidth associated with the active bandpass filter circuit.

Abstract: A neuroelectric sensor and stimulator system includes a first antenna, a reader coupled to the first antenna for transmitting stimulation controls and power to a second antenna, and for receiving sensor data transmitted from the second antenna via the first antenna, and at least one neuroelectric sensor stimulator array including the second antenna, a rectifier coupled to the second antenna for extracting power transmitted from the first antenna, a controller coupled to the second antenna for decoding controls transmitted from the first antenna to the second antenna for the neuroelectric sensor stimulator array, a plurality of sensors, a multiplexer coupled to the controller and to the plurality of sensors for selecting a single sensor, and a plurality of stimulators coupled to the controller for stimulating neurons, wherein the rectifier, the controller, the plurality of sensors, the multiplexer, and the plurality of stimulators include graphene.

Abstract: A multi-port active circulator includes a plurality of cascode circuits coupled to one another in a ring. Each respective cascode circuit of the plurality of cascode circuits is coupled to a respective port of a plurality of ports. Each respective cascode circuit includes a common source transistor, a common gate transistor coupled to the common source transistor, and a feedback circuit coupled from the common gate transistor to the common source transistor. Each common source transistor of each respective cascode circuit is coupled to a common junction point.

Abstract: An electronic circuit comprising: an integrated circuit chip, the integrated circuit chip having a top face; portions of the top face of the chip being covered by a first metal layer electrically connected to the integrated circuit; and a dielectic layer formed on the top face of the chip beside and on top of said first metal layer; wherein the dielectric layer extends parallel to the top face of the chip beyond the edges of the chip, the first metal layer extending in the dielectric layer beyond the edges of the chip; and wherein portions of a top surface of the dielectric layer are covered by a second metal layer, portions of the first and second metal layers being electrically connected through the dielectric layer.

Abstract: A broadband linear amplifier including an input, a first distributed amplifier coupled to the input and having a bias for one of Class A or Class AB operation, the first distributed amplifier including a first plurality of field effect transistors and having a first output, a second distributed amplifier coupled to the input and having a bias for Class C operation, the second distributed amplifier including a second plurality of field effect transistors and having a second output, and a summed output coupled to the first output and the second output, wherein gate widths of the first plurality of field effect transistors monotonically decrease from the input to the first output, and wherein gate widths of the second plurality of field effect transistors monotonically decrease from the input to the second output.

Abstract: A multi-port active circulator where each of plurality of FET transistors has (i) a gate connected to an associated port of the multi-port active circulator via a capacitor of an associated one of a plurality of first RF chokes, each of the first RF chokes being connected to a gate of an associated FET transistor of said plurality of transistors, the associated port of said associated FET transistor and to a power supply bias connection; (ii) a source connected to a common point; and (iii) a drain connected to the gate of the same FET transistor by a feedback circuit and connected to the gate of a neighboring FET transistor via a capacitor of one of a plurality of second RF chokes, each of which coupling gates and drains of neighboring FET transistors via capacitors thereof and being connected to another power supply bias connection.

Abstract: A mixer including a field effect transistor having a source, a drain and a gate, an input port coupled to the source or to the drain of the field effect transistor, an output port coupled to the drain of the field effect transistor if the input port is coupled to the source, or coupled to the source of the field effect transistor if the input port is coupled to the drain, a local oscillator for mixing a first frequency on the input port to a second frequency on the output port, a first micro-strip line coupling the local oscillator to the gate, and a shunt resistor capacitor termination coupled to the gate. The shunt resistor capacitor termination includes a resistor in series with a capacitor.