Abstract: A pore-filled ion exchange polyelectrolyte composite membrane from which the surface ion exchange polyelectrolyte has been removed and a method of manufacturing the same are provided. The ion exchange polyelectrolyte composite membrane exhibits low film resistance and low in-plane-direction swelling degree, and has a smaller film-thickness than a commercial film, and thus, can be used for various purposes. In addition, since the pore-filled ion exchange polyelectrolyte composite membrane is continuously manufactured through a roll-to-roll process, the manufacturing process is simple, and manufacturing costs can be greatly reduced.

Abstract: The present invention provides a compound that can utilize hydrogen isotope and, at the same time, can quantify multiplexed samples at one time, as well as decreasing the cost for synthesis of the labeling agent. In addition, the present invention provides a novel method for quantitatively analyzing protein and peptide analytes having different quantities form each other using the labeling agent, wherein y-type fragment ions having a high mass which comprises the analyte remained after coupling the labeling agent with the analyte and then removing a part of the labeling agent through tandem mass spectrometry are utilized to conduct the quantitative analysis.

Abstract: The present invention provides a compound that can utilize hydrogen isotope and, at the same time, can quantify multiplexed samples at one time, as well as decreasing the cost for synthesis of the labeling agent. In addition, the present invention provides a novel method for quantitatively analyzing protein and peptide analytes having different quantities form each other using the labeling agent, wherein y-type fragment ions having a high mass which comprises the analyte remained after coupling the labeling agent with the analyte and then removing a part of the labeling agent through tandem mass spectrometry are utilized to conduct the quantitative analysis.

Abstract: The present invention relates to a method of peptide sequencing by MALDI (matrix-assisted laser desorption ionization) tandem mass spectrometry, which comprises the steps of chemically modifying a sample peptide with at least one chemical modification method selected from the group consisting of guanidination and esterification in order to change the ionization status of the peptide and performing mass spectrometry using a MALDI tandem mass spectrometer and programmed MALDI tandem mass spectrometry. The peptide sequencing method of the present invention is advantageous in that detection sensitivity of the peptide improves significantly and various daughter ions are detected uniformly, thereby enabling perfect de novo sequencing with tandem mass spectrometry only, without database search.

Abstract: The present invention relates to a method of peptide sequencing by MALDI (matrix-assisted laser desorption ionization) tandem mass spectrometry, which comprises the steps of chemically modifying a sample peptide with at least one chemical modification method selected from the group consisting of guanidination and esterification in order to change the ionization status of the peptide and performing mass spectrometry using a MALDI tandem mass spectrometer and programmed MALDI tandem mass spectrometry. The peptide sequencing method of the present invention is advantageous in that detection sensitivity of the peptide improves significantly and various daughter ions are detected uniformly, thereby enabling perfect de novo sequencing with tandem mass spectrometry only, without database search.

Abstract: A memory module and related method are disclosed. The memory module comprises a clock generator configured to generate first and second internal clock signals in relation to an external clock signal, and a register configured to receive the first and second internal clock signals. The register stores an external control/address signal in response to the first internal clock signal and transmits an internal control/address signal derived from the external control/address in response to the second internal control/address signal.

Abstract: A test board for a high-frequency system level test: The test board includes a main board having through holes filled with a conductive material. These holes may be located at a portion of the main board from which an existing module socket has been removed. An interface board has surface mounted device (SMD) pads on front and rear surfaces. The SMD pads on the front surface of the interface board are connected with the SMD pads on the rear surface thereof through cross connection wiring within the interface board for a pin swap. The through holes of the main board are connected with the SMD pads on the rear surface of the interface board via iron cores fixed at a guide. A test module socket is mounted on surfaces of the SMD pads on the front surface of the interface board.

Abstract: A memory module and related method are disclosed. The memory module comprises a clock generator configured to generate first and second internal clock signals in relation to an external clock signal, and a register configured to receive the first and second internal clock signals. The register stores an external control/address signal in response to the first internal clock signal and transmits an internal control/address signal derived from the external control/address in response to the second internal control/address signal.

Abstract: We describe and claim an error detecting memory module and method. The module comprises a plurality of memory devices, each memory device to receive an address signal and a command signal from a memory controller, and to detect an error in the address and command signals responsive to an input parity signal. In an embodiment, each memory device is adapted to provide an output parity signal to the memory controller responsive to the detection.

Abstract: A test board for a high-frequency system level test: The test board includes a main board having through holes filled with a conductive material. These holes may be located at a portion of the main board from which an existing module socket has been removed. An interface board has surface mounted device (SMD) pads on front and rear surfaces. The SMD pads on the front surface of the interface board are connected with the SMD pads on the rear surface thereof through cross connection wiring within the interface board for a pin swap. The through holes of the main board are connected with the SMD pads on the rear surface of the interface board via iron cores fixed at a guide. A test module socket is mounted on surfaces of the SMD pads on the front surface of the interface board.