Patents by Inventor Jong Hwan Baek
Jong Hwan Baek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250234428Abstract: A substrate processing apparatus includes a chamber, a chamber door, an outer chamber, and a locking mechanism, in which the chamber door includes a first flange on which a substrate loader or a lower heater accommodating the substrate is placed, a rotating flange rotatably connected to the first flange, and a second flange disposed below the first flange and rotatably connected to the rotating flange.Type: ApplicationFiled: September 4, 2024Publication date: July 17, 2025Inventors: Young Joon Ham, Jeong Eui Kim, Yong Hwan Kwon, Jin Seok Lee, Jong Hwan Baek, Byung Wook Hwang, Yeon Min Mo
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Publication number: 20250198219Abstract: A door part used in a semiconductor substrate processing device includes a first flange on which a loader accommodating a wafer is placed, a second flange connected to a lower portion of the first flange, a caught protrusion part extending downward from an edge of the first flange, a door disposed below the second flange, and a guide connected to an upper surface of the door and in which a groove corresponding to a shape of at least a portion of the caught protrusion part is formed so that the caught protrusion part sits on the groove, in which the caught protrusion part is unseated from the groove of the guide depending on a height between the first flange and the door, and the door is rotatable when the caught protrusion part is unseated from the groove.Type: ApplicationFiled: September 4, 2024Publication date: June 19, 2025Inventors: Young Joon Ham, Jeong Eui Kim, Yong Hwan Kwon, Jin Seok Lee, Jong Hwan Baek
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Publication number: 20250191942Abstract: A substrate processing apparatus includes a chamber, a chamber door configured to open or close a chamber opening, an outer chamber configured to surround the chamber, in which the outer chamber includes an outer chamber upper surface, an outer chamber side surface, and an outer chamber base on an opposite side of the outer chamber upper surface and configured to seal between a chamber side surface and the outer chamber side surface, in which the outer chamber upper surface, the outer chamber side surface, and the outer chamber base form a sealed space between the outer chamber and the chamber.Type: ApplicationFiled: September 4, 2024Publication date: June 12, 2025Inventors: Young Joon Ham, Jeong Eui Kim, Yong Hwan Kwon, Jin Seok Lee, Jong Hwan Baek, Byung Wook Hwang, Yeon Min Mo
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Patent number: 8143099Abstract: The present invention relates to a method of manufacturing a semiconductor package capable of simplifying a process and remarkably reducing a production cost by including the steps of: preparing a different bonded panel including at least one metal layer; forming a pad unit electrically connected to the metal layer; mounting a semiconductor chip over the different bonded panel to be electrically connected to the pad unit; sealing the semiconductor chip; forming a rearrangement wiring layer by etching the metal layer; and forming an external connection unit electrically connected to the rearrangement wiring layer.Type: GrantFiled: May 5, 2009Date of Patent: March 27, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Seung Wook Park, Jin Gu Kim, Jong Hwan Baek, Jong Yun Lee, Hyung Jin Jeon, Young Do Kweon
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Publication number: 20110244515Abstract: The present invention relates to a method of increasing the expression of a target protein by co-expression of a gene encoding a target protein having a high content of a specific amino acid with a nucleotide sequence encoding the tRNA of the specific amino acid. According to the present invention, the expression of a protein having a high content of a specific amino acid can be remarkably increased by co-expression with the tRNA of the specific amino acid. Thus, the present invention is useful for increasing the productivity of a protein having a high content of a specific amino acid, such as a repetitive protein.Type: ApplicationFiled: September 22, 2009Publication date: October 6, 2011Inventors: Sang Yup Lee, Xiaoxia Xia, Zhi Gang Qian, Jong Hwan Baek
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Patent number: 7846754Abstract: A high power Light Emitting Diode (LED) package and a method of producing the same. The high power LED package according to the present invention includes a plurality of light emitting diode chips, a first lead frame with the light emitting diode chips mounted thereon, and a second lead frame disposed at a predetermined interval from the first lead frame. The LED package also includes a package body fixing the first and second lead frames and bonding wires for electrically connecting the plurality of LED chips with upward-inclined inner side walls thereof and a second reflecting part surrounding the entire plurality of LED chips with an upward-inclined inner side wall thereof.Type: GrantFiled: August 27, 2009Date of Patent: December 7, 2010Assignee: Samsung LED Co., Ltd.Inventors: Kyung Seob Oh, Jae Ky Roh, Jung Kyu Park, Jong Hwan Baek, Seung Hwan Choi
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Publication number: 20100149770Abstract: The present invention relates to a semiconductor stack package including: a printed circuit board; a first semiconductor chip mounted on the printed circuit board; a second semiconductor chip mounted on the printed circuit board in parallel with the first semiconductor chip; a first rearrangement wiring layer positioned on the first semiconductor chip; a second rearrangement wiring layer which constitutes one circuit together with the first rearrangement wiring layer and is positioned on the second semiconductor chip; and a third semiconductor chip which is electrically connected to the first and second rearrangement wiring layers and of which both ends are separately positioned on the first and second semiconductor chips.Type: ApplicationFiled: May 5, 2009Publication date: June 17, 2010Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seung Wook Park, Jin Gu Kim, Jong Hwan Baek, Jong Yun Lee, Hyung Jin Jeon, Young Do Kweon
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Publication number: 20100144152Abstract: The present invention relates to a method of manufacturing a semiconductor package capable of simplifying a process and remarkably reducing a production cost by including the steps of: preparing a different bonded panel including at least one metal layer; forming a pad unit electrically connected to the metal layer; mounting a semiconductor chip over the different bonded panel to be electrically connected to the pad unit; sealing the semiconductor chip; forming a rearrangement wiring layer by etching the metal layer; and forming an external connection unit electrically connected to the rearrangement wiring layer.Type: ApplicationFiled: May 5, 2009Publication date: June 10, 2010Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seung Wook Park, Jin Gu Kim, Jong Hwan Baek, Jong Yun Lee, Hyung Jin Jeon, Young Do Kweon
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Patent number: 7663250Abstract: A wafer level package and a manufacturing method thereof capable of reducing stress between an under bump metal and a bump. The wafer level package includes a substrate provided with a plurality of chip pads on a top surface; a first passivation layer to expose the chip pads; vias connected to the chip pads by passing through the first passivation layer; a metal wiring layer formed on the first passivation layer and connected to the vias; an under bump metal formed on the first passivation layer to be connected to the metal wiring layer and having a buffer pattern separated through a trench on a center; a second passivation layer formed on the first passivation layer to expose the under bump metal; a first bump formed on the buffer pattern; and a second bump filling the trench and formed on the first bump and the under bump metal.Type: GrantFiled: September 4, 2008Date of Patent: February 16, 2010Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Hyung Jin Jeon, Sung Yi, Jong Yun Lee, Young Do Kweon, Jong Hwan Baek
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Publication number: 20090309216Abstract: A wafer level package and a manufacturing method thereof capable of reducing stress between an under bump metal and a bump. The wafer level package includes a substrate provided with a plurality of chip pads on a top surface; a first passivation layer to expose the chip pads; vias connected to the chip pads by passing through the first passivation layer; a metal wiring layer formed on the first passivation layer and connected to the vias; an under bump metal formed on the first passivation layer to be connected to the metal wiring layer and having a buffer pattern separated through a trench on a center; a second passivation layer formed on the first passivation layer to expose the under bump metal; a first bump formed on the buffer pattern; and a second bump filling the trench and formed on the first bump and the under bump metal.Type: ApplicationFiled: September 4, 2008Publication date: December 17, 2009Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Hyung Jin Jeon, Sung Yi, Jong Yun Lee, Young Do Kweon, Jong Hwan Baek
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Publication number: 20090311811Abstract: A high power Light Emitting Diode (LED) package and a method of producing the same. The high power LED package according to the present invention includes a plurality of light emitting diode chips, a first lead frame with the light emitting diode chips mounted thereon, and a second lead frame disposed at a predetermined interval from the first lead frame. The LED package also includes a package body fixing the first and second lead frames and bonding wires for electrically connecting the plurality of LED chips. The package body includes at least one first reflecting part separately surrounding each of the plurality of LED chips with upward-inclined inner side walls thereof and a second reflecting part surrounding the entire plurality of LED chips with an upward-inclined inner side wall thereof.Type: ApplicationFiled: August 27, 2009Publication date: December 17, 2009Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTDInventors: Kyung Seob OH, Kae Ky Roh, Jung Kyu Park, Jong Hwan Baek, Seung Hwan Choi
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Publication number: 20090302468Abstract: Disclosed is a printed circuit board including a semiconductor chip, which includes a semiconductor chip having a connection pad, which is exposed, on the upper surface thereof, a first solder ball formed on the connection pad and having a first melting point, a printed circuit board having an external connection terminal formed at the outermost circuit layer thereof, and a second solder ball formed on the external connection terminal, connected to the first solder ball, and having a second melting point higher than the first melting point. In the printed circuit board including a semiconductor chip, the distance between the printed circuit board and the semiconductor chip is increased, thus realizing high resistance to flexure due to the difference in thermal expansion coefficient between the printed circuit board and the semiconductor chip.Type: ApplicationFiled: September 12, 2008Publication date: December 10, 2009Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jong Hwan Baek, Sung Yi, Young Do Kweon, Jong Yun Lee, Hyung Jin Jeon, Joon Seok Kang
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Patent number: 7598528Abstract: A high power Light Emitting Diode (LED) package and a method of producing the same. The high power LED package according to the present invention includes a plurality of light emitting diode chips, a first lead frame with the light emitting diode chips mounted thereon, and a second lead frame disposed at a predetermined interval from the first lead frame. The LED package also includes a package body fixing the first and second lead frames and bonding wires for electrically connecting the plurality of LED chips. The package body includes at least one first reflecting part separately surrounding each of the plurality of LED chips with upward-inclined inner side walls thereof and a second reflecting part surrounding the entire plurality of LED chips with an upward-inclined inner side wall thereof.Type: GrantFiled: June 13, 2007Date of Patent: October 6, 2009Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Kyung Seob Oh, Jae Ky Roh, Jung Kyu Park, Jong Hwan Baek, Seung Hwan Choi
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Publication number: 20090166862Abstract: Provided is a semiconductor device including a wafer having an electrode pad; an insulation layer that is formed on the wafer and has an exposure hole exposing the electrode pad; a redistribution layer that is formed on the insulation layer and the exposure hole of the insulation layer and has one end connected to the electrode pad; a conductive post that is formed at the other end of the redistribution layer; an encapsulation layer that is formed on the redistribution layer and the insulation layer such that the upper end portion of the conductive post is exposed; and a solder bump that is formed on the exposed upper portion of the conducive post.Type: ApplicationFiled: June 18, 2008Publication date: July 2, 2009Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Young Do Kweon, Jae Kwang Lee, Jong Hwan Baek, Hyung Jin Jeon, Jingli Yuan
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Publication number: 20090166859Abstract: Provided is a semiconductor device including a wafer having an electrode pad; an insulating layer that is formed on the wafer and has an exposure hole formed in one side thereof, the exposure layer exposing the electrode pad, and a support post formed in the other side, the support post having a buffer groove; a redistribution layer that is formed on the top surface of the insulating layer and has one end connected to the electrode pad and the other end extending to the support post; an encapsulation layer that is formed on the redistribution layer and the insulating layer and exposes the redistribution layer formed on the support post; and a solder bump that is provided on the exposed portion of the redistribution layer.Type: ApplicationFiled: March 26, 2008Publication date: July 2, 2009Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jingli Yuan, Young Do Kweon, Jong Hwan Baek, Joon Seok Kang, Seung Wook Park, Jong Yun Lee
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Patent number: 7511312Abstract: A surface mounting device-type light emitting diode (SMD-type LED) comprises a package housing one or more pairs of electrodes therein, the package having a predetermined space in the center thereof and a light-emission window which is opened so that light is emitted through the light-emission window; a lens formed on the package so as to cover the light-emission window; an LED chip formed on an electrode inside the package; a wire for electrically connecting the LED chip and the electrode; and a phosphor-mixed layer formed on the surface of the lens adjacent to the light-emission window.Type: GrantFiled: April 6, 2007Date of Patent: March 31, 2009Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Joon Seok Chae, Jong Hwan Baek
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Publication number: 20080042151Abstract: A high power Light Emitting Diode (LED) package and a method of producing the same. The high power LED package according to the present invention includes a plurality of light emitting diode chips, a first lead frame with the light emitting diode chips mounted thereon, and a second lead frame disposed at a predetermined interval from the first lead frame. The LED package also includes a package body fixing the first and second lead frames and bonding wires for electrically connecting the plurality of LED chips. The package body includes at least one first reflecting part separately surrounding each of the plurality of LED chips with upward-inclined inner side walls thereof and a second reflecting part surrounding the entire plurality of LED chips with an upward-inclined inner side wall thereof.Type: ApplicationFiled: June 13, 2007Publication date: February 21, 2008Inventors: Kyung Seob Oh, Jae Ky Roh, Jung Kyu Park, Jong Hwan Baek, Seung Hwan Choi
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Publication number: 20080023714Abstract: A surface mounting device-type light emitting diode (SMD-type LED) comprises a package housing one or more pairs of electrodes therein, the package having a predetermined space in the center thereof and a light-emission window which is opened so that light is emitted through the light-emission window; a lens formed on the package so as to cover the light-emission window; an LED chip formed on an electrode inside the package; a wire for electrically connecting the LED chip and the electrode; and a phosphor-mixed layer formed on the surface of the lens adjacent to the light-emission window.Type: ApplicationFiled: April 6, 2007Publication date: January 31, 2008Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Joon-Seok Chae, Jong Hwan Baek