Patents by Inventor Jonghyun PAEK

Jonghyun PAEK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Variable resistance memory device
    Patent number: 11276821
    Abstract: A semiconductor device includes a plurality of first conductive lines disposed on a substrate, a plurality of second conductive lines intersecting the plurality of first conductive lines, and a plurality of cell structures interposed between the plurality of first conductive lines and the plurality of second conductive lines. At least one among the plurality of cell structures includes a first electrode, a switching element disposed on the first electrode, a second electrode disposed on the switching element, a first metal pattern disposed on the second electrode, a variable resistance pattern interposed between the first metal pattern and at least one among the plurality of second conductive lines, and a first spacer disposed on a sidewall of the variable resistance pattern, a sidewall of the first metal pattern and a sidewall of the second electrode.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: March 15, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seulji Song, Jonguk Kim, Kyusul Park, Woohyun Park, Jonghyun Paek
  • VARIABLE RESISTANCE MEMORY DEVICE
    Publication number: 20210104671
    Abstract: A semiconductor device includes a plurality of first conductive lines disposed on a substrate, a plurality of second conductive lines intersecting the plurality of first conductive lines, and a plurality of cell structures interposed between the plurality of first conductive lines and the plurality of second conductive lines. At least one among the plurality of cell structures includes a first electrode, a switching element disposed on the first electrode, a second electrode disposed on the switching element, a first metal pattern disposed on the second electrode, a variable resistance pattern interposed between the first metal pattern and at least one among the plurality of second conductive lines, and a first spacer disposed on a sidewall of the variable resistance pattern, a sidewall of the first metal pattern and a sidewall of the second electrode.
    Type: Application
    Filed: January 14, 2020
    Publication date: April 8, 2021
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seulji SONG, Jonguk KIM, Kyusul PARK, Woohyun PARK, Jonghyun PAEK