Patents by Inventor Jongik Won
Jongik Won has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230046377Abstract: A foldable electronic device and method for the same are disclosed herein. The foldable electronic device includes at least one display, a sensor, at least one camera, a processor, at least one switch electrically connecting the at least one display, at least one camera and processor. The processor implements the method, including: detecting an operating state of the device via the sensor, and controlling the at least one switch to selectively connect the processor to one of the display and the at least one camera, based on the detected operating state.Type: ApplicationFiled: August 1, 2022Publication date: February 16, 2023Inventors: Moonki YEO, Miyoung KIM, Suyoun KIM, Seungjoon KIM, Seunghui SUNWOO, Jongik WON, Daekyu LEE, Dongyup LEE, Jiesoon JEONG, Kwangrae CHO, Sangheum CHO
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Patent number: 11482871Abstract: Various embodiments of the present invention relate to an electronic device and a charging control method therefor. The electronic device may comprise: a connection terminal for performing wired communication with an external electronic device; and at least one processor functionally connected to the connection terminal, wherein the at least one processor detects connection of a charging device through the connection terminal, receives state information of at least one adjacent terminal located next to a power terminal of the connection terminal, and controls charging power to be supplied thereto through the charging device, on the basis of the received state information of the adjacent terminal. In addition, various other embodiments are possible.Type: GrantFiled: May 15, 2018Date of Patent: October 25, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Young-Jin Park, Sung-Ha Park, Joon-Yung Park, Jung-Oh Sung, Dong-Rak Shin, Jae-Hyun Ahn, Sung-Eun Lee, Wooin Choi, Insun Choi, Jongik Won
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Publication number: 20200153256Abstract: Various embodiments of the present invention relate to an electronic device and a charging control method therefor. The electronic device may comprise: a connection terminal for performing wired communication with an external electronic device; and at least one processor functionally connected to the connection terminal, wherein the at least one processor detects connection of a charging device through the connection terminal, receives state information of at least one adjacent terminal located next to a power terminal of the connection terminal, and controls charging power to be supplied thereto through the charging device, on the basis of the received state information of the adjacent terminal. In addition, various other embodiments are possible.Type: ApplicationFiled: May 15, 2018Publication date: May 14, 2020Inventors: Young-Jin PARK, Sung-Ha PARK, Joon-Yung PARK, Jung-Oh SUNG, Dong-Rak SHIN, Jae-Hyun AHN, Sung-Eun LEE, Wooin CHOI, Insun CHOI, Jongik WON
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Patent number: 9329346Abstract: A method of manufacture of an integrated circuit coupling system includes: forming a waveguide assembly, having a top clad over an open end of an optical core; forming a first photoresist having a base photoresist pattern shape with sloped photoresist sidewalls tapered down to expose a portion of the top clad; forming a recess having clad sidewalls from the portion of the top clad exposed by the base photoresist pattern shape, the clad sidewalls having a shape replicating a shape of the base photo resist pattern shape; and forming an optical vertical insertion area, from the clad sidewalls forming the recess, having a pocket trench, a horizontal step, and a mirror with a reflective material selectively applied to a section of the clad sidewalls and exposing the open end opposite to the mirror, the horizontal step between the mirror and the pocket trench.Type: GrantFiled: May 6, 2015Date of Patent: May 3, 2016Assignee: NeoPhotonics CorporationInventors: Jongik Won, Hsiang En Tseng, Luis Martinez, Anthony J. Ticknor
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Publication number: 20150234124Abstract: A method of manufacture of an integrated circuit coupling system includes: forming a waveguide assembly, having a top clad over an open end of an optical core; forming a first photoresist having a base photoresist pattern shape with sloped photoresist sidewalls tapered down to expose a portion of the top clad; forming a recess having clad sidewalls from the portion of the top clad exposed by the base photoresist pattern shape, the clad sidewalls having a shape replicating a shape of the base photo resist pattern shape; and forming an optical vertical insertion area, from the clad sidewalls forming the recess, having a pocket trench, a horizontal step, and a mirror with a reflective material selectively applied to a section of the clad sidewalls and exposing the open end opposite to the mirror, the horizontal step between the mirror and the pocket trench.Type: ApplicationFiled: May 6, 2015Publication date: August 20, 2015Inventors: Jongik Won, Hsiang En Tseng, Luis Martinez, Anthony J. Ticknor
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Patent number: 9052460Abstract: A method of manufacture of an integrated circuit coupling system includes: forming a waveguide assembly, having a top clad over an open end of an optical core; forming a first photoresist having a base photoresist pattern shape with sloped photoresist sidewalls tapered down to expose a portion of the top clad; forming a recess having clad sidewalls from the portion of the top clad exposed by the base photoresist pattern shape, the clad sidewalls having a shape replicating a shape of the base photo resist pattern shape; and forming an optical vertical insertion area, from the clad sidewalls forming the recess, having a pocket trench, a horizontal step, and a mirror with a reflective material selectively applied to a section of the clad sidewalls and exposing the open end opposite to the mirror, the horizontal step between the mirror and the pocket trench.Type: GrantFiled: December 27, 2012Date of Patent: June 9, 2015Assignee: NeoPhotonics CorporationInventors: Jongik Won, Hsiang En Tseng, Luis Martinez, Anthony J. Ticknor
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Patent number: 7182878Abstract: This relates to optical devices such as planar light-wave components/circuits which are designed to have a high waveguide pattern density effecting a higher etch selectivity and overall improved dimensional control of the functional waveguides on the optical device.Type: GrantFiled: February 6, 2004Date of Patent: February 27, 2007Assignee: Lightwave Microsystems CorporationInventors: Jongik Won, Calvin Ka Kuen Ho, Fan Zhong, Liang Zhao
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Publication number: 20040159855Abstract: This relates to optical devices such as planar light-wave components/circuits which are designed to have a high waveguide pattern density effecting a higher etch selectivity and overall improved dimensional control of the functional waveguides on the optical device.Type: ApplicationFiled: February 6, 2004Publication date: August 19, 2004Inventors: Jongik Won, Calvin Ka Kuen Ho, Fan Zhong, Liang Zhao
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Patent number: 6732550Abstract: A method of making an optical waveguide structure having improved thermal isolation and stress reduction. The method etches both deep trenches and shallow trenches in a single step. The method includes the step of depositing a partial top clad layer over a first and second waveguide core. An etch back is then performed on the partial top clad layer to obtain a desired thickness of the partial top clad layer. A first hard mask layer is subsequently deposited over the partial top clad layer. A set of hard masks are then formed over the first and second waveguide cores by patterning and etching the first hard mask layer. A full top clad layer is then deposited over the partial top clad layer and the set hard masks to form a top clad. A second hard mask layer is then deposited over the top clad. A deep trench area and first and second shallow trench areas are then exposed by patterning and etching the second hard mask layer.Type: GrantFiled: September 6, 2001Date of Patent: May 11, 2004Assignee: Lightwave Microsystems, Inc.Inventor: Jongik Won
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Patent number: 6690025Abstract: This relates to optical devices such as planar light-wave components/circuits which are designed to have a high waveguide pattern density effecting a higher etch selectivity and overall improved dimensional control of the functional waveguides on the optical device.Type: GrantFiled: July 10, 2001Date of Patent: February 10, 2004Assignee: Lightwave Microsystems CorporationInventors: Jongik Won, Calvin Ka Kuen Ho, Fan Zhong, Liang Zhao
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Publication number: 20030133684Abstract: A method of making a polarization insensitive optical waveguide structure. An optical core layer is formed on a substrate, wherein the optical core layer has a higher refractive index than the substrate. A mask is formed over the optical core layer. The unmasked areas of the optical core layer are then over-etched to define the core, wherein the over-etching removes the unmasked area of the optical core layer and a portion of the substrate disposed beneath the unmasked area, and defines the optical core. The mask is subsequently removed from the optical core. A cladding layer is then formed over the optical core and the substrate, the cladding layer having a lower refractive index than the optical core, to form a polarization insensitive optical waveguide structure. The amount of over-etching can be controlled to control an amount of substrate disposed beneath the unmasked area of the optical core layer that is removed.Type: ApplicationFiled: January 23, 2003Publication date: July 17, 2003Applicant: LIGHTWAVE MICROSYSTEMS CORPORATIONInventors: Jongik Won, Fan Zhong, Farnaz Parhami, Nizar S. Kheraj
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Patent number: 6542687Abstract: A method of making a polarization insensitive optical waveguide structure. An optical core layer is formed on a substrate, wherein the optical core layer has a higher refractive index than the substrate. A mask is formed over the optical core layer. The unmasked areas of the optical core layer are then over-etched to define the core, wherein the over-etching removes the unmasked area of the optical core layer and a portion of the substrate disposed beneath the unmasked area, and defines the optical core. The mask is subsequently removed from the optical core. A cladding layer is then formed over the optical core and the substrate, the cladding layer having a lower refractive index than the optical core, to form a polarization insensitive optical waveguide structure. The amount of over-etching can be controlled to control an amount of substrate disposed beneath the unmasked area of the optical core layer that is removed.Type: GrantFiled: May 31, 2001Date of Patent: April 1, 2003Assignee: Lightwave Microsystems, Inc.Inventors: Jongik Won, Fan Zhong, Farnaz Parhami, Nizar S. Kheraj
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Publication number: 20030041624Abstract: A method of making an optical waveguide structure having improved thermal isolation and stress reduction. The method etches both deep trenches and shallow trenches in a single step. The method includes the step of depositing a partial top clad layer over a first and second waveguide core. An etch back is then performed on the partial top clad layer to obtain a desired thickness of the partial top clad layer. A first hard mask layer is subsequently deposited over the partial top clad layer. A set of hard masks are then formed over the first and second waveguide cores by patterning and etching the first hard mask layer. A full top clad layer is then deposited over the partial top clad layer and the set hard masks to form a top clad. A second hard mask layer is then deposited over the top clad. A deep trench area and first and second shallow trench areas are then exposed by patterning and etching the second hard mask layer.Type: ApplicationFiled: September 6, 2001Publication date: March 6, 2003Inventor: Jongik Won
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Publication number: 20020181916Abstract: A method of making a polarization insensitive optical waveguide structure. An optical core layer is formed on a substrate, wherein the optical core layer has a higher refractive index than the substrate. A mask is formed over the optical core layer. The unmasked areas of the optical core layer are then over-etched to define the core, wherein the over-etching removes the unmasked area of the optical core layer and a portion of the substrate disposed beneath the unmasked area, and defines the optical core. The mask is subsequently removed from the optical core. A cladding layer is then formed over the optical core and the substrate, the cladding layer having a lower refractive index than the optical core, to form a polarization insensitive optical waveguide structure. The amount of over-etching can be controlled to control an amount of substrate disposed beneath the unmasked area of the optical core layer that is removed.Type: ApplicationFiled: May 31, 2001Publication date: December 5, 2002Inventors: Jongik Won, Fan Zhong, Farnaz Parhami, Nizar S. Kheraj
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Publication number: 20020168860Abstract: This relates to optical devices such as planar light-wave components/circuits which are designed to have a high waveguide pattern density effecting a higher etch selectivity and overall improved dimensional control of the functional waveguides on the optical device.Type: ApplicationFiled: July 10, 2001Publication date: November 14, 2002Inventors: Jongik Won, Calvin Ka Kuen Ho, Fan Zhong, Liang Zhao