Abstract: A receiver circuit includes data lane modules, a clock lane module, a bias current controller and a link layer. Each of the data lane modules receive respective data signals. The clock lane module receives clock signals and provides each of the data lane modules with a respective divided clock signal among divided clock signals. The bias current controller controls a clock bias current. The link layer provides a bias control signal to the bias current controller and provides clock gating signals to the clock lane module, based on low power data signals low power clock signals. The bias current controller, based on the bias control signal, provides the clock bias current having a first magnitude to the clock lane module in a second power mode and provides the clock bias current having a second magnitude to the clock lane module in a third power mode.

Abstract: According to one embodiment, an inspection apparatus of a semiconductor device includes a first probe configured to contact a first portion of the semiconductor device, a conductive member configured to oppose a second portion of the semiconductor device, and a detector configured to apply a first voltage between the semiconductor device and the first probe, to apply a conductive member voltage between the semiconductor device and the conductive member, and to detect a current flowing in the first probe. The first voltage has a first polarity of one of positive or negative when referenced to a potential of the semiconductor device. The conductive member voltage has a second polarity of the other of positive or negative when referenced to the potential of the semiconductor device.

Abstract: According to one embodiment, a crystal growth method includes forming a first member at at least a part of a bottom portion of a hole in a structure body. The hole includes the bottom portion and a side portion. The first member includes a first element. The first element is not adhered to at least a part of the side portion in the forming the first member. The crystal growth method includes growing a crystal member inside the hole by supplying a source material to the hole after the forming the first member. The source material includes a second element. The crystal member includes the second element.

Abstract: According to one embodiment, a crystal growth method includes forming a first member at at least a part of a bottom portion of a hole in a structure body. The hole includes the bottom portion and a side portion. The first member includes a first element. The first element is not adhered to at least a part of the side portion in the forming the first member. The crystal growth method includes growing a crystal member inside the hole by supplying a source material to the hole after the forming the first member. The source material includes a second element. The crystal member includes the second element.

Abstract: According to one embodiment, an inspection apparatus of a semiconductor device includes a first probe configured to contact a first portion of the semiconductor device, a conductive member configured to oppose a second portion of the semiconductor device, and a detector configured to apply a first voltage between the semiconductor device and the first probe, to apply a conductive member voltage between the semiconductor device and the conductive member, and to detect a current flowing in the first probe. The first voltage has a first polarity of one of positive or negative when referenced to a potential of the semiconductor device. The conductive member voltage has a second polarity of the other of positive or negative when referenced to the potential of the semiconductor device.

Abstract: According to one embodiment, a light emitting element includes n-type and p-type semiconductor layers and a light emitting unit. The light emitting unit is provided between the n-type semiconductor layer and the p-type semiconductor layer, the light emitting unit emits light with a peak wavelength of not less than 530 nm. The light emitting unit includes an n-side barrier layer and a first light emitting layer. The first light emitting layer includes a first barrier layer provided between the n-side barrier layer and the p-type semiconductor layer, a first well layer contacting the n-side barrier layer between the n-side barrier layer and the first barrier layer, a first AlGaN layer provided between the first well layer and the first barrier layer and including Alx1Ga1-x1N (0.15?x1?1), and a first p-side InGaN layer provided between the first AlGaN layer and the first barrier layer and including Inya1Ga1-ya1N (0<ya1?0.1).

Abstract: According to one embodiment, a semiconductor light emitting device includes: first and second semiconductor layers, a light emitting part, and an In-containing layer. The first semiconductor layer is formed on a silicon substrate via a foundation layer. The light emitting part is provided on the first semiconductor layer, and includes barrier layers and a well layer provided between the barrier layers including Ga1-z1Inz1N (0<z1?1). The second semiconductor layer is provided on the light emitting part. The In-containing layer is provided at at least one of first and second positions. The first position is between the first semiconductor layer and the light emitting part. The second position is between the second semiconductor layer and the light emitting part. The In-containing layer includes In with a composition ratio different from the In composition ratio z1 and has a thickness 10 nm to 1000 nm.

Abstract: A semiconductor light-emitting element includes a substrate having a first side and a second side, a first semiconductor layer of a first conductivity type on the first side of the substrate, a second semiconductor layer of a second conductivity type between the substrate and the first semiconductor layer, a third semiconductor layer between the first semiconductor layer and the second semiconductor layer, and a metal layer between the substrate and the second semiconductor layer. The substrate has a first surface on the first side facing the metal layer and a second surface on the second side opposite to the first surface, and the second surface is convex.

Abstract: According to one embodiment, a semiconductor light emitting element includes a light reflecting layer, first second, third and fourth semiconductor layers, first and second light emitting layers, and a first light transmitting layer. The second semiconductor layer is provided between the first semiconductor layer and the light reflecting layer. The first light emitting layer is provided between the first and second semiconductor layers. The first light transmitting layer is provided between the second semiconductor layer and the light reflecting layer. The third semiconductor layer is provided between the first light transmitting layer and the light reflecting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the light reflecting layer. The second light emitting layer is provided between the third and fourth semiconductor layers. The light reflecting layer is electrically connected to one selected from the third and fourth semiconductor layers.

Abstract: According to one embodiment, a light emitting element includes n-type and p-type semiconductor layers and a light emitting unit. The light emitting unit is provided between the n-type semiconductor layer and the p-type semiconductor layer, the light emitting unit emits light with a peak wavelength of not less than 530 nm. The light emitting unit includes an n-side barrier layer and a first light emitting layer. The first light emitting layer includes a first barrier layer provided between the n-side barrier layer and the p-type semiconductor layer, a first well layer contacting the n-side barrier layer between the n-side barrier layer and the first barrier layer, a first AlGaN layer provided between the first well layer and the first barrier layer and including Alx1Ga1-x1N (0.15?x1?1), and a first p-side InGaN layer provided between the first AlGaN layer and the first barrier layer and including Inya1Ga1-ya1N (0<ya1?0.1).

Abstract: According to one embodiment, a semiconductor light emitting device includes a light emitting layer and a first semiconductor layer. The first semiconductor layer is arranged with the light emitting layer in a first direction. The first semiconductor layer includes a first portion and a second portion. The first portion and a second portion include a nitride semiconductor. The first portion has a first lattice polarity. The second portion has a second lattice polarity different from the first lattice polarity.

Abstract: According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can prepare a substrate unit including a base substrate, an intermediate crystal layer, and a first mask layer. The intermediate crystal layer has a major surface having a first region, a second region, and a first intermediate region. The first mask layer is provided on the first intermediate region. The method can implement a first growth to grow a first lower layer on the first region and grow a second lower layer on the second region. The first and second lower layers include a semiconductor crystal. The method can implement a second growth to grow a second upper layer while growing a first upper layer to cover the first mask layer with the first and second upper layers. The method can implement cooling to separate the first and second upper layers.

Abstract: According to one embodiment, a semiconductor light emitting element includes a light reflecting layer, first second, third and fourth semiconductor layers, first and second light emitting layers, and a first light transmitting layer. The second semiconductor layer is provided between the first semiconductor layer and the light reflecting layer. The first light emitting layer is provided between the first and second semiconductor layers. The first light transmitting layer is provided between the second semiconductor layer and the light reflecting layer. The third semiconductor layer is provided between the first light transmitting layer and the light reflecting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the light reflecting layer. The second light emitting layer is provided between the third and fourth semiconductor layers. The light reflecting layer is electrically connected to one selected from the third and fourth semiconductor layers.

Abstract: According to one embodiment, a semiconductor light emitting device includes: a conductive layer; a first stacked body; a second stacked body; a first light-transmissive electrode; and a first interconnect electrode. The first stacked body includes a first semiconductor layer and a second semiconductor layer. The second semiconductor layer is provided between the first semiconductor layer and the conductive layer. The first light emitting layer is provided between the first semiconductor layer and the second semiconductor layer. The second stacked body includes a third semiconductor layer, a fourth semiconductor layer, and a second light emitting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the conductive layer. The second light emitting layer is provided between the third semiconductor layer and the fourth semiconductor layer. The first interconnect electrode is provided between the second semiconductor layer and the third semiconductor layer.

Abstract: According to one embodiment, a semiconductor light emitting element includes a light reflecting layer, first second, third and fourth semiconductor layers, first and second light emitting layers, and a first light transmitting layer. The second semiconductor layer is provided between the first semiconductor layer and the light reflecting layer. The first light emitting layer is provided between the first and second semiconductor layers. The first light transmitting layer is provided between the second semiconductor layer and the light reflecting layer. The third semiconductor layer is provided between the first light transmitting layer and the light reflecting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the light reflecting layer. The second light emitting layer is provided between the third and fourth semiconductor layers. The light reflecting layer is electrically connected to one selected from the third and fourth semiconductor layers.

Abstract: According to one embodiment, a semiconductor light emitting device includes: a conductive layer; a first stacked body; a second stacked body; a first light-transmissive electrode; and a first interconnect electrode. The first stacked body includes a first semiconductor layer and a second semiconductor layer. The second semiconductor layer is provided between the first semiconductor layer and the conductive layer. The first light emitting layer is provided between the first semiconductor layer and the second semiconductor layer. The second stacked body includes a third semiconductor layer, a fourth semiconductor layer, and a second light emitting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the conductive layer. The second light emitting layer is provided between the third semiconductor layer and the fourth semiconductor layer. The first interconnect electrode is provided between the second semiconductor layer and the third semiconductor layer.

Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a well layer, a barrier layer, an Al-containing layer, and an intermediate layer. The p-type semiconductor layer is provided on a side of [0001] direction of the n-type semiconductor layer. The well layer, the barrier layer, the Al-containing layer and the intermediate layer are disposed between the n-type semiconductor layer and the p-type semiconductor layer subsequently. The Al-containing layer has a larger band gap energy than the barrier layer, a smaller lattice constant than the n-type semiconductor layer, and a composition of Alx1Ga1-x1-y1Iny1N. The intermediate layer has a larger band gap energy than the well layer, and has a first portion and a second portion provided between the first portion and the p-type semiconductor layer. A band gap energy of the first portion is smaller than that of the second portion.

Abstract: According to one embodiment, a semiconductor light emitting element includes a first electrode, first and second light emitting units, first and second conductive layers, a first connection electrode, a first dielectric layer, first and second pads, and a first inter-light emitting unit dielectric layer. The first light emitting unit includes first and second semiconductor layers, and a first light emitting layer. The first semiconductor layer includes a first semiconductor portion and a second semiconductor portion. The second light emitting unit includes a third semiconductor layer, a fourth semiconductor layer, and a second light emitting layer. The fourth semiconductor layer is electrically connected with the first electrode. The first conductive layer is electrically connected with the third semiconductor layer. The second conductive layer is electrically connected with the second semiconductor layer.

Abstract: A light-emitting electric-power generation module according to an embodiment includes a photoelectric conversion element for emitting light and generating electric power, a light-emission controller configured to control light emission of the photoelectric conversion element, an electric-power generation controller configured to control electric-power generation of the photoelectric conversion element, and a switching unit configured to switch light-emission state and electric-power generation state of the photoelectric conversion element.

Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer and configured to emit a light having a peak wavelength of 440 nanometers or more. Tensile strain is applied to the first semiconductor layer. An edge dislocation density of the first semiconductor layer is 5×109/cm2 or less. A lattice mismatch factor between the first semiconductor layer and the light emitting layer is 0.11 percent or less.