Patents by Inventor Jongill Hong

Jongill Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260032919
    Abstract: A ferromagnetic memory device comprises a memory cell. wherein the memory cell includes a magnetic free layer including a magnetic layer, and wherein the magnetic free layer including a magnetic anisotropy energy gradient induced within the magnetic layer by plasma ion irradiation.
    Type: Application
    Filed: December 26, 2024
    Publication date: January 29, 2026
    Inventors: Jongill HONG, Jaegyu JEONG
  • Publication number: 20250374832
    Abstract: A semiconductor device includes a free magnetization layer including a ferromagnetic layer and a nonmagnetic metal layer including current electrodes receiving an input current and Hall voltage electrodes outputting a Hall voltage. The Hall voltage is generated by an anomalous Hall effect occurring in the ferromagnetic layer of the free magnetization layer due to the input current flowing in the nonmagnetic metal layer. The Hall voltage has one of a local minimum value and a local maximum value when a value of the input current sequentially changes from a first value to a second value. One of the first value and the second value is greater than the other one of the first value and the second value.
    Type: Application
    Filed: December 17, 2024
    Publication date: December 4, 2025
    Inventor: Jongill HONG
  • Patent number: 12382641
    Abstract: Disclosed are a spin logic device based on spin-charge conversion and a spin logic array using the same. A reconfigurable spin logic array according to an exemplary embodiment of the present invention may include: an input terminal receiving at least three current signals; a plurality of wires transmitting the current signal in connection with the input terminal and including a horizontal wire and a vertical wire which cross each other; a first gate array in which at least one first majority gate connected to the input terminal through the wires and implemented based on the spin logic device is arranged; and a second gate array in which at least one second majority gate connected to the first gate array through the wires and implemented based on the spin logic device is arranged.
    Type: Grant
    Filed: August 24, 2023
    Date of Patent: August 5, 2025
    Assignees: INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY, INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY ERICA CAMPUS
    Inventors: Jongill Hong, Saeroonter Oh
  • Patent number: 12375084
    Abstract: A spin logic device includes a first stage unit in which one side of the first magnetic layer is connected to an upper end of a first spin-charge conversion layer, a first dielectric layer is connected to a lower end of the other side of the first magnetic layer, a first conductive channel for receiving input current is connected to a lower end of the first dielectric layer, a first input portion formed of a conductor for receiving a first drive voltage is connected to an upper end of one side of the first magnetic layer, a second conductive channel for outputting first output current is connected to a lower end of the first spin-charge conversion layer, and a first conductor having a ground is connected to a lower end of the second conductive channel. A resistor for outputting steady current as the first output current may be connected between nodes on opposite ends of the second conductive channel.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: July 29, 2025
    Assignees: INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY, INU Research & Business Foundation, INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY ERICA CAMPUS
    Inventors: Jongill Hong, Taehui Na, Saeroonter Oh
  • Publication number: 20240349618
    Abstract: A spin logic device includes: a first conductive layer formed of a nonmagnetic conductive material and having one end receiving first current as an input; a ferromagnetic layer having magnetic anisotropy and having one end opposing the other end of the first conductive layer; and an antiferroelectric layer disposed between the other end of the first conductive layer and the one end of the ferromagnetic layer. A magnetization direction of the ferromagnetic layer may be determined based on a current direction of the first current of the first conductive layer.
    Type: Application
    Filed: November 21, 2023
    Publication date: October 17, 2024
    Inventors: Jongill HONG, Min Hyuk PARK, Taehui NA
  • Patent number: 12041854
    Abstract: Disclosed art a magnetic tunnel junction device, a magnetic memory using the same, and a method for manufacturing the same. The method for manufacturing the magnetic tunnel junction device may include the steps of a lamination step of forming an initial multilayer structure including at least one metallic oxide layer and a metallic layer on a substrate; a heat treatment step of heat-treating the initial multilayer structure; and a device forming step of forming a magnetic tunnel junction device of a final multilayer structure in which at least one metallic oxide layer and the metallic layer are converted to at least one ferromagnetic material layer and the oxide layer by heat treatment.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: July 16, 2024
    Assignee: UIF (University Industry Foundation), Yonsei University
    Inventor: Jongill Hong
  • Publication number: 20240162905
    Abstract: A spin logic device includes a first stage unit in which one side of the first magnetic layer is connected to an upper end of a first spin-charge conversion layer, a first dielectric layer is connected to a lower end of the other side of the first magnetic layer, a first conductive channel for receiving input current is connected to a lower end of the first dielectric layer, a first input portion formed of a conductor for receiving a first drive voltage is connected to an upper end of one side of the first magnetic layer, a second conductive channel for outputting first output current is connected to a lower end of the first spin-charge conversion layer, and a first conductor having a ground is connected to a lower end of the second conductive channel. A resistor for outputting steady current as the first output current may be connected between nodes on opposite ends of the second conductive channel.
    Type: Application
    Filed: January 9, 2023
    Publication date: May 16, 2024
    Inventors: Jongill HONG, Taehui NA, Saeroonter OH
  • Publication number: 20230403865
    Abstract: Disclosed are a spin logic device based on spin-charge conversion and a spin logic array using the same. A reconfigurable spin logic array according to an exemplary embodiment of the present invention may include: an input terminal receiving at least three current signals; a plurality of wires transmitting the current signal in connection with the input terminal and including a horizontal wire and a vertical wire which cross each other; a first gate array in which at least one first majority gate connected to the input terminal through the wires and implemented based on the spin logic device is arranged; and a second gate array in which at least one second majority gate connected to the first gate array through the wires and implemented based on the spin logic device is arranged.
    Type: Application
    Filed: August 24, 2023
    Publication date: December 14, 2023
    Inventors: Jongill HONG, Saeroonter OH
  • Patent number: 11785783
    Abstract: Disclosed are a spin logic device based on spin-charge conversion and a spin logic array using the same. A reconfigurable spin logic array according to an exemplary embodiment of the present invention may include: an input terminal receiving at least three current signals; a plurality of wires transmitting the current signal in connection with the input terminal and including a horizontal wire and a vertical wire which cross each other; a first gate array in which at least one first majority gate connected to the input terminal through the wires and implemented based on the spin logic device is arranged; and a second gate array in which at least one second majority gate connected to the first gate array through the wires and implemented based on the spin logic device is arranged.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: October 10, 2023
    Assignees: INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY, INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY ERICA CAMPUS
    Inventors: Jongill Hong, Saeroonter Oh
  • Publication number: 20220131069
    Abstract: Disclosed art a magnetic tunnel junction device, a magnetic memory using the same, and a method for manufacturing the same. The method for manufacturing the magnetic tunnel junction device may include the steps of a lamination step of forming an initial multilayer structure including at least one metallic oxide layer and a metallic layer on a substrate; a heat treatment step of heat-treating the initial multilayer structure; and a device forming step of forming a magnetic tunnel junction device of a final multilayer structure in which at least one metallic oxide layer and the metallic layer are converted to at least one ferromagnetic material layer and the oxide layer by heat treatment.
    Type: Application
    Filed: October 25, 2021
    Publication date: April 28, 2022
    Inventor: Jongill HONG
  • Publication number: 20200365652
    Abstract: Disclosed are a spin logic device based on spin-charge conversion and a spin logic array using the same. A reconfigurable spin logic array according to an exemplary embodiment of the present invention may include: an input terminal receiving at least three current signals; a plurality of wires transmitting the current signal in connection with the input terminal and including a horizontal wire and a vertical wire which cross each other; a first gate array in which at least one first majority gate connected to the input terminal through the wires and implemented based on the spin logic device is arranged; and a second gate array in which at least one second majority gate connected to the first gate array through the wires and implemented based on the spin logic device is arranged.
    Type: Application
    Filed: May 15, 2020
    Publication date: November 19, 2020
    Inventors: Jongill HONG, Saeroonter OH
  • Patent number: 10522748
    Abstract: The present invention relates to a magnetic device including a spin-current pattern generating a spin current perpendicular to a main plane of the spin-current pattern by an in-plane current, and a free magnetic layer disposed in contact with the spin-current pattern and having a perpendicular magnetic anisotropy magnetically switchable by the spin current.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: December 31, 2019
    Assignee: UNIVERSITY-INDUSTRY FOUNDATION (UIF), YONSEI UNIVERSITY
    Inventor: Jongill Hong
  • Publication number: 20190103553
    Abstract: The present invention relates to a magnetic device including a spin-current pattern generating a spin current perpendicular to a main plane of the spin-current pattern by an in-plane current, and a free magnetic layer disposed in contact with the spin-current pattern and having a perpendicular magnetic anisotropy magnetically switchable by the spin current.
    Type: Application
    Filed: August 29, 2018
    Publication date: April 4, 2019
    Inventor: Jongill Hong
  • Patent number: 10164172
    Abstract: Provided are a multi-layered magnetic thin film stack, a magnetic tunneling junction, and a data storage device. The multi-layered magnetic thin film stack includes a FePd alloy layer including an alloy of iron (Fe) and palladium (Pd); a tunneling barrier layer, which includes MgO and is disposed on the FePd alloy layer; and a Heusler alloy layer disposed between the FePd alloy layer and the tunneling barrier layer, wherein the FePd alloy layer and the Heusler alloy layer constitute a hybrid magnetic layer.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: December 25, 2018
    Assignees: SK HYNIX INC., INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Jongill Hong, Taejin Bae, Sung Joon Yoon
  • Publication number: 20170294574
    Abstract: Provided are a multi-layered magnetic thin film stack, a magnetic tunneling junction, and a data storage device. The multi-layered magnetic thin film stack includes a FePd alloy layer including an alloy of iron (Fe) and palladium (Pd); a tunneling barrier layer, which includes MgO and is disposed on the FePd alloy layer; and a Heusler alloy layer disposed between the FePd alloy layer and the tunneling barrier layer, wherein the FePd alloy layer and the Heusler alloy layer constitute a hybrid magnetic layer.
    Type: Application
    Filed: April 12, 2017
    Publication date: October 12, 2017
    Inventors: Jongill HONG, Taejin BAE, Sung Joon YOON
  • Patent number: 9315389
    Abstract: The present invention relates to hydrogen surface-treated graphene, a formation method thereof, and an electronic device including the same. The graphene according to one exemplary embodiment of the present invention can be useful in preparing hydrogen surface-treated graphene having a band gap using simple methods through indirect hydrogen plasma treatment. Also, the graphene according to one exemplary embodiment of the present invention can be useful in forming two regions having different band gaps through the indirect hydrogen plasma treatment, and thus can be useful in reducing the processing time and the processing cost since the graphene is directly applicable to electronic devices such as transistors, and touch panels.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: April 19, 2016
    Assignee: University-Industry Foundation, Yonsei University
    Inventors: Jongill Hong, Jangyup Son
  • Publication number: 20150110706
    Abstract: The present invention relates to hydrogen surface-treated graphene, a formation method thereof, and an electronic device including the same. The graphene according to one exemplary embodiment of the present invention can be useful in preparing hydrogen surface-treated graphene having a band gap using simple methods through indirect hydrogen plasma treatment. Also, the graphene according to one exemplary embodiment of the present invention can be useful in forming two regions having different band gaps through the indirect hydrogen plasma treatment, and thus can be useful in reducing the processing time and the processing cost since the graphene is directly applicable to electronic devices such as transistors, and touch panels.
    Type: Application
    Filed: October 17, 2014
    Publication date: April 23, 2015
    Inventors: Jongill Hong, Jangyup Son
  • Patent number: 8504148
    Abstract: Provided is a neural device including at least one nano-wire. The neural device includes a nano-wire formed on a base formed on a first surface of a substrate, and an electrode pad formed on a second surface different from the first surface of the substrate and configured to output an electrical signal gained from a neural fiber through the nano-wire or apply a signal for an electric stimulus to the nano-wire. Therefore, it is possible to prevent the nano-wire from becoming embedded in an encapsulation and maximize a contact between the nano-wire and a nerve.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: August 6, 2013
    Assignees: Industry-Academic Cooperation Foundation, Yonsei University, I3SYSTEM, Inc.
    Inventors: Donghyun Kim, Jongill Hong, Gunhee Han, Taewook Kim, Heonjin Choi, Seunghan Park, Seongyeol Pyo, Sooho Bae, Han Chung
  • Publication number: 20120130459
    Abstract: Provided is a neural device including at least one nano-wire. The neural device includes a nano-wire formed on a base formed on a first surface of a substrate, and an electrode pad formed on a second surface different from the first surface of the substrate and configured to output an electrical signal gained from a neural fiber through the nano-wire or apply a signal for an electric stimulus to the nano-wire. Therefore, it is possible to prevent the nano-wire from becoming embedded in an encapsulation and maximize a contact between the nano-wire and a nerve.
    Type: Application
    Filed: October 8, 2010
    Publication date: May 24, 2012
    Applicants: I3SYSTEM, Inc., Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Donghyun Kim, Jongill Hong, Gunhee Han, Taewook Kim, Heonjin Choi, Seunghan Park, Seongyeol Pyo, Sooho Bae, Han Chung
  • Publication number: 20100270710
    Abstract: The present invention relates to a method for fabricating a magnetic pattern and a method for manufacturing a patterned media through fabrication of the magnetic pattern. The method for fabricating the magnetic pattern according to an embodiment of the present invention comprises the steps of (a) coating a pattern forming layer for fabricating a magnetic pattern on a substrate; (b) forming a mask layer that has a designed opening pattern with a nano imprinting process using a stamp that has a nanostructure pattern on the pattern forming layer; and (c) converting an area of the pattern forming layer that corresponds to the predetermined opening pattern into a magnetic area by irradiating a predetermined hydrogen ion beam onto the mask layer.
    Type: Application
    Filed: December 22, 2008
    Publication date: October 28, 2010
    Applicant: Industry-Academic Cooperation Foundation Yonsei University
    Inventors: Shinill Kang, Jongill Hong