Abstract: Disclosed is an electrode assembly, a battery, and a battery pack and a vehicle including the same. In the electrode assembly, a first electrode, a second electrode, and a separator interposed therebetween are wound based on a winding axis to define a core and an outer circumference. The first electrode includes a first active material portion coated with an active material layer and a first uncoated portion not coated with an active material layer along a winding direction. At least a part of the first uncoated portion is defined as an electrode tab by itself. The first uncoated portion includes a first portion adjacent to the core of the electrode assembly, a second portion adjacent to the outer circumference of the electrode assembly, and a third portion interposed between the first portion and the second portion. The first portion or the second portion has a smaller height than the third portion in the winding axis direction.

Abstract: Disclosed is an electrode assembly, a battery, and a battery pack and a vehicle including the same. In the electrode assembly, a first electrode, a second electrode, and a separator interposed therebetween are wound based on an axis to define a core and an outer circumference. The first electrode includes an uncoated portion at a long side end thereof and exposed out of the separator along a winding axis direction of the electrode assembly. A part of the uncoated portion is bent in a radial direction of the electrode assembly to form a bending surface region that includes overlapping layers of the uncoated portion, and in a partial region of the bending surface region, the number of stacked layers of the uncoated portion is 10 or more in the winding axis direction of the electrode assembly.

Abstract: A filter holder comprises: a plurality of filter frames disposed such that at least some thereof are adjacent to each other; and a folding member which supports filter frames, from among the plurality of filter frames, adjacent to each other so as to be rotatable with respect to each other. The folding member comprises: a folding part which has a predetermined thickness and is flexible so as to be foldable by means of rotation of the adjacent filter frames adjacent with respect to each other; and a plurality of edge parts which are connected to the respective sides of the folding part with the folding portion therebetween and rotate together with the adjacent filter frames, and wherein when viewed from a cross-section of the folding member, the edge parts may have a greater thickness than the folding part.

Abstract: An air filter comprises: a first filter frame in which a plurality of first chambers are formed; a second filter frame in which a plurality of second chambers are formed and which is arranged at the rear of the first filter frame; and a filter material which is accommodated in the plurality of first chambers and the plurality of second chambers to filter air, wherein the first filter frame and the second filter frame are arranged so that, when seen from the front, the center of each of the plurality of second chambers is out of line with the center of each of the plurality of first chambers, in the vertical direction.

Abstract: A wafer manufacturing method, an epitaxial wafer manufacturing method, and a wafer and epitaxial wafer manufactured thereby, are provided. The wafer manufacturing method enables the manufacture of a wafer with a low density of micropipe defects and minimum numbers of particles and scratches. The epitaxial wafer manufacturing method enables the manufacture of an epitaxial wafer that has low densities of defects such as downfall, triangular, and carrot defects, exhibits excellent device characteristics, and improves the yield of devices.

Abstract: According to the present invention, an adaptive scheme is applied to an image encoding apparatus that includes an inter-predictor, an intra-predictor, a transformer, a quantizer, an inverse quantizer, and an inverse transformer, wherein input images are classified into two or more different categories, and two or more modules from among the inter-predictor, the intra-predictor, the transformer, the quantizer, and the inverse quantizer are implemented to perform respective operations in different schemes according to the category to which an input image belongs. Thus, the invention has the advantage of efficiently encoding an image without the loss of important information as compared to a conventional image encoding apparatus which adopts a packaged scheme.

Abstract: A wafer manufacturing method, an epitaxial wafer manufacturing method, and a wafer and epitaxial wafer manufactured thereby, are provided. The wafer manufacturing method enables the manufacture of a wafer with a low density of micropipe defects and minimum numbers of particles and scratches. The epitaxial wafer manufacturing method enables the manufacture of an epitaxial wafer that has low densities of defects such as downfall, triangular, and carrot defects, exhibits excellent device characteristics, and improves the yield of devices.

Abstract: An energy storage system constructed with a power conversion system that transmits and receives electric power respectively to and from, an external power grid and to apply the electric power received from the external power grid to an electric load via a first path, and a bypass switch shunt coupled with the power conversion system to provide a second and different path to apply power received from the external power grid to the electric load.

Abstract: A waveform generator capable of generating a square wave and a ramp wave using one switching element is provided. A waveform generator includes a first transistor having a drain electrode, a gate electrode, and a source electrode. A first resistor and a first diode are coupled at a common node between a first input terminal and the gate electrode. A second resistor is coupled between the gate electrode and a second input terminal. A first capacitor is coupled between the drain electrode and the common node between the first resistor and the first diode.

Abstract: A plasma display device includes first to fourth transistors and a plurality of first electrodes. A first terminal of a first capacitor is connected to a power supply supplying a voltage. A second terminal of a second capacitor connected to a second terminal of the first capacitor is connected to a ground terminal. A first diode is connected to the first electrodes through a first inductor and a fifth transistor, which forms a voltage rising path. A second diode is connected to the first electrodes through a second inductor and a sixth transistor, which forms a voltage falling path. A third diode is connected to the third transistor and the second diode, which forms a voltage sustaining path during a voltage rising period. A fourth diode is connected to the second transistor and the first diode, which forms a voltage sustaining path of a voltage falling period.

Abstract: A waveform generator capable of generating a square wave and a ramp wave using one switching element is provided. A waveform generator includes a first transistor having a drain electrode, a gate electrode, and a source electrode. A first resistor and a first diode are coupled at a common node between a first input terminal and the gate electrode. A second resistor is coupled between the gate electrode and a second input terminal. A first capacitor is coupled between the drain electrode and the common node between the first resistor and the first diode.

Abstract: A plasma display device includes a plurality of scan lines for selecting a plurality of discharge cells and extending in a row direction. The plasma display device sequentially applies a scan pulse to the plurality of scan lines. The plasma display device calculates a data similarity ratio of two adjacent scan lines by using subfield data of each discharge cell disposed on the two adjacent scan lines among the plurality of scan lines, and overlaps the scan pulses applied to the two adjacent scan lines when the data similarity ratio of two adjacent scan lines is greater than a predetermined ratio.

Abstract: A plasma display device includes first to fourth transistors and a plurality of first electrodes. A first terminal of a first capacitor is connected to a power supply supplying a voltage. A second terminal of a second capacitor connected to a second terminal of the first capacitor is connected to a ground terminal. A first diode is connected to the first electrodes through a first inductor and a fifth transistor, which forms a voltage rising path. A second diode is connected to the first electrodes through a second inductor and a sixth transistor, which forms a voltage falling path. A third diode is connected to the third transistor and the second diode, which forms a voltage sustaining path during a voltage rising period. A fourth diode is connected to the second transistor and the first diode, which forms a voltage sustaining path of a voltage falling period.

Abstract: A plasma display according to an embodiment of the present invention has first, second, and third transistors which are coupled between a first power source for supplying a first voltage and a second power source for supplying a second voltage which is lower than the first voltage is disclosed. A first terminal of a fourth transistor is coupled to the first and second transistors, and a first terminal of a fifth transistor is coupled to the second and third transistors. In addition, a capacitor is coupled between a second terminal of the fourth transistor and a second terminal of the fifth transistor and is charged with a voltage corresponding to a difference between the first and second voltages.

Abstract: A plasma display device and a method for driving the plasma display device. In a first subfield, a first voltage is alternately applied to the first and second electrodes by applying a first addressing scheme for converting an on-cell to an off-cell for a sustain period. In a second subfield, the off-cell is converted to the light emitting state. Initialization in a reset period is appropriately performed whether a write addressing method or an erase addressing method is used.

Abstract: The present invention relates to a multi-pulse HVDC system which is capable of minimizing the number of thyristors by providing a thyristor auxiliary circuit in a conventional 12-pulse thyristor HVDC(High Voltage Direct Current), not using an additional stack of a thyristor and which is implemented based on an auxiliary circuit having a multi-pulse thyristor HVDC system like 24-pulse/36-pulse/48-pulse converters. The multi-pulse HVDC system is characterized in that an upper side thyristor converter 12 and a lower side thyristor converter 13 are installed in a ?-?-Y transformer 11, and two current smoothing reactor 39 and a direct voltage dividing condenser 38 are installed between the upper side thyristor converter 12 and the lower side thyristor converter 13, and two thyristors 32, 33: T2 and T1 are connected to one double winding transformer 31.

Abstract: The present invention relates to a multi-pulse HVDC system which is capable of minimizing the number of thyristors by providing a thyristor auxiliary circuit in a conventional 12-pulse thyristor HVDC(High Voltage Direct Current), not using an additional stack of a thyristor and which is implemented based on an auxiliary circuit having a multi-pulse thyristor HVDC system like 24-pulse/36-pulse/48-pulse converters. The multi-pulse HVDC system is characterized in that an upper side thyristor converter 12 and a lower side thyristor converter 13 are installed in a &Dgr;-&Dgr;-Y transformer 11, and two current smoothing reactor 39 and a direct voltage dividing condenser 38 are installed between the upper side thyristor converter 12 and the lower side thyristor converter 13, and two thyristors 32, 33: T2 and T1 are connected to one double winding transformer 31.