Abstract: A device formed from a method of fabricating a fine metal silicide layer having a uniform thickness regardless of substrate doping. A planar vacancy is created by the separation of an amorphousized surface layer of a silicon substrate from an insulating layer, a metal source enters the vacancy through a contact hole through the insulating later connecting with the vacancy, and a heat treatment converts the metal in the vacancy into metal silicide. The separation is induced by converting the amorphous silicon into crystalline silicon.

Abstract: A device formed from a method of fabricating a fine metal silicide layer having a uniform thickness regardless of substrate doping. A planar vacancy is created by the separation of an amorphousized surface layer of a silicon substrate from an insulating layer, a metal source enters the vacancy through a contact hole through the insulating later connecting with the vacancy, and a heat treatment converts the metal in the vacancy into metal silicide. The separation is induced by converting the amorphous silicon into crystalline silicon.

Abstract: A device formed from a method of fabricating a fine metal silicide layer having a uniform thickness regardless of substrate doping. A planar vacancy is created by the separation of an amorphousized surface layer of a silicon substrate from an insulating layer, a metal source enters the vacancy through a contact hole through the insulating later connecting with the vacancy, and a heat treatment converts the metal in the vacancy into metal silicide. The separation is induced by converting the amorphous silicon into crystalline silicon.

Abstract: A semiconductor device comprises a substrate, a gate structure formed on the substrate, a channel region below the gate structure in the substrate, a first source/drain region and a second source/drain region located at opposite side of the gate structure, a first lightly-doped drain (LDD) junction region formed between the first source/drain region and one end of the channel region, a second lightly-doped drain (LDD) junction region formed between the second source/drain region and the other end of the channel region, a metal silicide layer having a first metal formed on the first and second source/drain regions, an insulating layer formed on the metal silicide layer and the gate structure having a first opening to expose the metal silicide layer, and a conductive layer having the first metal and filling the first opening to contact the metal silicide layer.

Abstract: A device formed from a method of fabricating a fine metal silicide layer having a uniform thickness regardless of substrate doping. A planar vacancy is created by the separation of an amorphousized surface layer of a silicon substrate from an insulating layer, a metal source enters the vacancy through a contact hole through the insulating later connecting with the vacancy, and a heat treatment converts the metal in the vacancy into metal silicide. The separation is induced by converting the amorphous silicon into crystalline silicon.

Abstract: A device formed from a method of fabricating a fine metal silicide layer having a uniform thickness regardless of substrate doping. A planar vacancy is created by the separation of an amorphousized surface layer of a silicon substrate from an insulating layer, a metal source enters the vacancy through a contact hole through the insulating layer connecting with the vacancy, and a heat treatment converts the metal in the vacancy into metal silicide. The separation is induced by converting the amorphous silicon into crystalline silicon.

Abstract: A semiconductor device comprises a substrate, a gate structure formed on the substrate, a channel region below the gate structure in the substrate, a first source/drain region and a second source/drain region located at opposite side of the gate structure, a first lightly-doped drain (LDD) junction region formed between the first source/drain region and one end of the channel region, a second lightly-doped drain (LDD) junction region formed between the second source/drain region and the other end of the channel region, a metal silicide layer having a first metal formed on the first and second source/drain regions, an insulating layer formed on the metal silicide layer and the gate structure having a first opening to expose the metal silicide layer, and a conductive layer having the first metal and filling the first opening to contact the metal silicide layer.

Abstract: A device formed from a method of fabricating a fine metal silicide layer having a uniform thickness regardless of substrate doping. A planar vacancy is created by the separation of an amorphousized surface layer of a silicon substrate from an insulating layer, a metal source enters the vacancy through a contact hole through the insulating later connecting with the vacancy, and a heat treatment converts the metal in the vacancy into metal silicide. The separation is induced by converting the amorphous silicon into crystalline silicon.