Patents by Inventor Jong Oh Lee

Jong Oh Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12226041
    Abstract: Disclosed in the present invention is a low-temperature cooking machine. The low-temperature cooking machine comprises a flexible heating unit and a pump, and the pump is used for providing pressure or suction to cause the flexible heating unit to deform and contact and heat food. The low-temperature cooking machine in the present invention is a novel cooking device; under the action of the pump, the flexible heating unit as a heater can be deformed and directly contact food, so as to directly heat and cook the food. The low-temperature cooking machine in the present invention is a novel device and can replace an existing low-temperature cooking device having a constant temperature water bath and a vacuum plastic package machine.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: February 18, 2025
    Assignee: FOSHAN SHUNDE MIDEA ELECTRICAL HEATING APPLIANCES MANUFACTURING CO., LTD.
    Inventors: Wenwang Tang, Yong Yang, Jong Oh Lee
  • Publication number: 20210393068
    Abstract: Disclosed in the present invention is a low-temperature cooking machine. The low-temperature cooking machine comprises a flexible heating unit and a pump, and the pump is used for providing pressure or suction to cause the flexible heating unit to deform and contact and heat food. The low-temperature cooking machine in the present invention is a novel cooking device; under the action of the pump, the flexible heating unit as a heater can be deformed and directly contact food, so as to directly heat and cook the food. The low-temperature cooking machine in the present invention is a novel device and can replace an existing low-temperature cooking device having a constant temperature water bath and a vacuum plastic package machine.
    Type: Application
    Filed: September 1, 2021
    Publication date: December 23, 2021
    Inventors: Wenwang TANG, Yong YANG, Jong Oh LEE
  • Publication number: 20210027332
    Abstract: A method of operating a short-term rental restaurant and persuading users to visit the short-term rental restaurant on the basis of a profile, includes: creating by, a central server, a profile channel, the central server being configured to broker a lease of a shared restaurant for a predetermined short period of time; registering, by the central server, information about favorable users; registering rental information with the central server by a shared-restaurant manager terminal used by a shared-restaurant manager operating the shared restaurant equipped with the kitchen utensils; signing, by a profile manager terminal used by the profile manager, a contract to rent a short-term rental restaurant by retrieving shared restaurants registered with the central server to select one shared restaurant as the short-term rental restaurant; and providing, by the central server, sales information of the shared restaurant of the profile manager to a terminal of a favorable user.
    Type: Application
    Filed: July 27, 2020
    Publication date: January 28, 2021
    Inventor: JONG OH LEE
  • Patent number: 9357201
    Abstract: According to one embodiment of the present invention, a stereoscopic display apparatus comprises: a display panel in which a plurality of unit pixels is defined and which enables n views; and a parallax barrier disposed on one side of the display panel. n is an integer larger than 2, and p and 1 are divisors of said n. In said display panel, q unit pixels arranged adjacently to one other in rows constitute one unit row, and said n views are achieved by means of p unit rows arranged adjacently to one another in columns.
    Type: Grant
    Filed: February 2, 2012
    Date of Patent: May 31, 2016
    Inventors: Gyo Hyun Lee, Jong Oh Lee
  • Publication number: 20160099056
    Abstract: A page buffer for a NAND flash memory array includes a pre-charge switch, a first switch, a read switch, a write switch, a latch, and a data switch. The pre-charge switch is coupled between a supply node with a supply voltage and a bit line that is coupled to a selected cell of the NAND flash memory array. The first switch is coupled between the bit line and a data node. The read switch is coupled between the data node and an I/O node. The write switch is coupled between an inverse data node, which is out of phase with the data node, and the I/O node. The latch is coupled between the data node and the inverse data node. The data switch is coupled between the inverse data node and a first node. The enable switch is coupled between the first node and a ground.
    Type: Application
    Filed: October 6, 2014
    Publication date: April 7, 2016
    Inventor: Jong Oh LEE
  • Patent number: 9305649
    Abstract: A page buffer for a NAND flash memory array includes a pre-charge switch, a first switch, a read switch, a write switch, a latch, and a data switch. The pre-charge switch is coupled between a supply node with a supply voltage and a bit line that is coupled to a selected cell of the NAND flash memory array. The first switch is coupled between the bit line and a data node. The read switch is coupled between the data node and an I/O node. The write switch is coupled between an inverse data node, which is out of phase with the data node, and the I/O node. The latch is coupled between the data node and the inverse data node. The data switch is coupled between the inverse data node and a first node. The enable switch is coupled between the first node and a ground.
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: April 5, 2016
    Assignee: WINBOND ELECTRONICS CORP.
    Inventor: Jong Oh Lee
  • Patent number: 9245639
    Abstract: A NAND flash memory achieves low read latency and avoidance of inadvertent programming and program disturb so that the random access and initial page read speeds of the NAND flash memory are generally comparable to that of a NOR flash memory, while preserving the higher memory density and lower power operation characteristics of traditional NAND flash memory relative to NOR flash memory. The reduction in latency is achieved by a NAND memory array architecture which employs a small NAND string, a dual plane interleaved memory architecture, a partitioned NAND array, selectively coupled local bit lines per each global bit line, and a counter-biasing mechanism to avoid inadvertent programming and program disturb.
    Type: Grant
    Filed: October 13, 2014
    Date of Patent: January 26, 2016
    Assignee: Windbound Electronics Corporation
    Inventors: Jong Oh Lee, Anil Gupta, Dae Hyun Kim
  • Publication number: 20140029093
    Abstract: A stereo display panel, according to the present embodiment, has a plurality of unit pixels which are defined and enables an n perspective, wherein the n is an integral that is greater than or equal to 2 and is a multiple of integral p and integral q, wherein a q number of unit pixels that are adjacent in a row direction form one unit row, and a p number of the unit rows are adjacent in a column direction so as to enable the n perspective. When the n is the sum of integral z and integral y, an image for enabling the n perspective comprises the z number of input images and the y number of compensation images.
    Type: Application
    Filed: April 9, 2012
    Publication date: January 30, 2014
    Inventors: Jong Oh Lee, Gyo Hyun Lee
  • Publication number: 20140028671
    Abstract: Provided are a stereo display panel, an apparatus for stereo display, and a method for displaying an image. The stereo display panel defines a plurality of unit pixels and implements a plurality of views. Here, q unit pixels adjacent to each other in a row direction form one unit row, and q is an integer. p unit rows adjacent to each other in a column direction implements the plurality of views, and p is an integer. When a product of the integer p and the integer q is n, the integer n is a multiple of 2. An image implemented in the stereo display panel includes z basic images and (n?z) compensation images.
    Type: Application
    Filed: April 9, 2012
    Publication date: January 30, 2014
    Inventors: Jong Oh Lee, Gyo Hyun Lee
  • Publication number: 20130314779
    Abstract: According to one embodiment of the present invention, a parallax barrier is to be disposed one side of a display panel in which a plurality of unit pixels is defined and which achieves n views. The parallax barrier comprises a plurality of light-transmitting units and light-blocking units corresponding to said plurality of unit pixels, respectively. n is an integer larger than 2, and one unit pixel corresponding to one light-transmitting unit and m unit pixels corresponding to the light-blocking units are alternately arranged in rows, wherein m is obtained by subtracting 1 from q, which is in turn obtained by dividing n by p, which is a divisor.
    Type: Application
    Filed: February 2, 2012
    Publication date: November 28, 2013
    Inventors: Jong Oh Lee, Gyo Hyun Lee
  • Publication number: 20130307943
    Abstract: According to one embodiment of the present invention, a stereoscopic display apparatus comprises: a display panel in which a plurality of unit pixels is defined and which enables n views; and a parallax barrier disposed on one side of the display panel. n is an integer larger than 2, and p and 1 are divisors of said n. In said display panel, q unit pixels arranged adjacently to one other in rows constitute one unit row, and said n views are achieved by means of p unit rows arranged adjacently to one another in columns.
    Type: Application
    Filed: February 2, 2012
    Publication date: November 21, 2013
    Inventors: Jong Oh Lee, Gyo Hyun Lee
  • Patent number: 8385301
    Abstract: Provided are an apparatus and method for increasing operation time in an IEEE802.15.4-2006 beacon based wireless sensor network (WSN) with respect to the same amount of power consumption used by coordinators included in a WSN, by reducing unnecessary standby power consumption required during an active period of a super frame in a beacon-enabled mode.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: February 26, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong Oh Lee, Nae Soo Kim, Cheol Sig Pyo
  • Publication number: 20100128706
    Abstract: Provided are an apparatus and method for increasing operation time in an IEEE802.15.4-2006 beacon based wireless sensor network (WSN) with respect to the same amount of power consumption used by coordinators included in a WSN, by reducing unnecessary standby power consumption required during an active period of a super frame in a beacon-enabled mode.
    Type: Application
    Filed: November 17, 2009
    Publication date: May 27, 2010
    Inventors: Jong Oh LEE, Nae Soo Kim, Cheol Sig Pyo
  • Patent number: 7697458
    Abstract: A node for self localization, a clustering method using the same, and a localization method are provided. The node, which is located in a specific space so as to constitute a sensor network, includes a location information messaging unit which receives one or more location information messages including information on spatial locations of one or more neighboring nodes in the sensor network from the neighboring nodes in the sensor network; a distance calculator which calculates a first distance to the neighboring node on the basis of the location information included in the received location information messages and calculates a second distance to one or more neighboring nodes on the basis of the received time or intensity of the message on the location information; and a clustering unit which forms clusters of the node and a plurality of neighboring nodes in which the difference between the first and second distances is less than a predetermined threshold.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: April 13, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jongjun Park, Jong Oh Lee, Sun Joong Kim, Cheol Sig Pyo, Jong Suk Chae
  • Publication number: 20080069008
    Abstract: A node for self localization, a clustering method using the same, and a localization method are provided. The node, which is located in a specific space so as to constitute a sensor network, includes a location information messaging unit which receives one or more location information messages including information on spatial locations of one or more neighboring nodes in the sensor network from the neighboring nodes in the sensor network; a distance calculator which calculates a first distance to the neighboring node on the basis of the location information included in the received location information messages and calculates a second distance to one or more neighboring nodes on the basis of the received time or intensity of the message on the location information; and a clustering unit which forms clusters of the node and a plurality of neighboring nodes in which the difference between the first and second distances is less than a predetermined threshold.
    Type: Application
    Filed: June 7, 2007
    Publication date: March 20, 2008
    Inventors: Jongjun PARK, Jong Oh LEE, Sun Joong KIM, Cheol Sig PYO, Jong Suk CHAE
  • Publication number: 20040015707
    Abstract: The present disclosure discloses a control system for protecting external program codes, which can prevent the program codes of an external ROM from being leaked by encrypting address signals and data codes. The control system for protecting the external program codes includes an external ROM configured to store the program codes, and a micro-controller configured to read and to process the program codes from the external ROM. The external ROM stores the encrypted program codes, and the micro-controller decrypts and uses the encrypted program codes from the external ROM. Here, the micro-controller reads the program codes from the external ROM and uses encrypted address signals. The external ROM stores reordered program codes according to the encrypted address signals.
    Type: Application
    Filed: December 27, 2002
    Publication date: January 22, 2004
    Inventor: Jong Oh Lee
  • Patent number: 6191977
    Abstract: A sense circuit for multi-level flash memory cell includes a control signal generator for generating a plurality of voltage control signals, a clock signal having constant period and a plurality of control pulses according to a sense amplifier enable signal; a control voltage generator for generating multi-steps voltage according to the clock signal and the plurality of voltage control signals, sequentially supplying the multi-steps voltage to a program gate of the memory cell, generating a reference voltage according to the sense amplifier enable signal and supplying the reference voltage to a program gate of a reference cell; and a sense amplifier for sequentially comparing a plurality of data stored in the memory cell and a data of the reference cell, storing the result according to the control pulse and converting it into binary data.
    Type: Grant
    Filed: March 25, 1999
    Date of Patent: February 20, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Jong Oh Lee
  • Patent number: D1093924
    Type: Grant
    Filed: June 7, 2023
    Date of Patent: September 23, 2025
    Assignee: CERAGEM CO., LTD.
    Inventors: Yeon Soo Kang, Jong Oh Lee, Jung Hyun Jo
  • Patent number: D1108863
    Type: Grant
    Filed: June 7, 2023
    Date of Patent: January 13, 2026
    Inventors: Yeon Soo Kang, Jong Oh Lee, Jung Hyun Jo
  • Patent number: D1120662
    Type: Grant
    Filed: November 21, 2023
    Date of Patent: March 31, 2026
    Inventors: Jung Hyun Cho, Jong Oh Lee, Yeon Soo Kang