Patents by Inventor Jong-uk Song
Jong-uk Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240131532Abstract: According to at least one example embodiment, a substrate treating apparatus includes a substrate support structure including a spin head, the substrate support structure configured to support a substrate, and rotate the substrate, at least one treating liquid recovery container configured to recover at least one substrate treating liquid, and a discharging device including a first nozzle and a second nozzle, the first nozzle configured to discharge a chemical onto the substrate, and the second nozzle configured to discharge deionized water onto the substrate, wherein the first nozzle includes a surface pattern configured to provide roughness on an inner surface of the first nozzle.Type: ApplicationFiled: September 11, 2023Publication date: April 25, 2024Applicants: SEMES CO., LTD., Samsung Electronics Co., Ltd.Inventors: Jong Han KIM, Jin Uk SONG, Rae Taek OH, Ji Ho KIM, Ho Kyung KANG, Kwang Sung SON
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Patent number: 10013307Abstract: System and methods are provided for storing address-mapping data from a storage device on a processing system. Address-mapping data is stored on a non-volatile memory of a storage device, the address-mapping data indicating mapping from logical addresses to physical addresses of the non-volatile memory of the storage device. The address-mapping data is transmitted from the non-volatile memory to a processing system. In response to a request to access a logical address of the non-volatile memory, part of the address-mapping data is transferred from the processing system to a volatile memory of the storage device, the part of the address-mapping data being associated with a mapping from the logical address to a physical address of the non-volatile memory.Type: GrantFiled: December 14, 2015Date of Patent: July 3, 2018Assignee: MARVELL INTERNATIONAL LTD.Inventors: Jong-uk Song, Yun Chan Myung
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Patent number: 9959936Abstract: The present disclosure describes apparatuses and techniques that enable temperature-based memory access. In some aspects, a request to access a memory device is received. In response to the request, respective temperatures are determined for multiple locations of the memory device. Based on these respective temperatures, a selection can be made of which of the multiple locations to access. Alternately or additionally, an order in which to access the multiple locations can be determined based on the respective temperatures. The location(s) of the memory device are then accessed based on the selection or the determined order effective to minimize an increase in the memory device's temperature.Type: GrantFiled: March 10, 2015Date of Patent: May 1, 2018Assignee: Marvell International Ltd.Inventor: Jong-uk Song
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Patent number: 9430339Abstract: Some of the embodiments of the present disclosure provide a method comprising: storing volatile data in nonvolatile memory; over a time interval, periodically refreshing the volatile data by (i) reading the volatile data from the nonvolatile memory and (ii) rewriting the volatile data to the nonvolatile memory; determining a number of errors in the volatile data that is read during the periodic refresh of the volatile data; and based, at least in part, on the number of errors that is determined, modifying the time interval. The method may also comprise decreasing the time interval if the number of errors is determined to be greater than an error threshold value.Type: GrantFiled: December 24, 2013Date of Patent: August 30, 2016Assignee: Marvell International Ltd.Inventor: Jong-uk Song
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Patent number: 9228349Abstract: Disclosed is a method of enhancing fire resistance of high-strength concrete by mixing a spalling reducer (fiber cocktail) into the concrete to control spalling and performing shear reinforcement of main steel bars using shear stiffeners based on a wire rope and spacers.Type: GrantFiled: September 5, 2013Date of Patent: January 5, 2016Assignee: KOREA INSTITUTE OF CONSTRUCTION TECHNOLOGYInventors: Heung-Youl Kim, Hyung-Jun Kim, In-Hwan Yeo, Bum-Yean Cho, Jong-Uk Song, Dae-Bong Ju
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Patent number: 9213632Abstract: System and methods are provided for storing address-mapping data from a storage device on a processing system. Address-mapping data is stored on a non-volatile memory of a storage device, the address-mapping data indicating mapping from logical addresses to physical addresses of the non-volatile memory of the storage device. The address-mapping data is transmitted from the non-volatile memory to a processing system. In response to a request to access a logical address of the non-volatile memory, part of the address-mapping data is transferred from the processing system to a volatile memory of the storage device, the part of the address-mapping data being associated with a mapping from the logical address to a physical address of the non-volatile memory.Type: GrantFiled: January 18, 2013Date of Patent: December 15, 2015Assignee: MARVELL INTERNATIONAL LTD.Inventors: Jong-uk Song, Yun Chan Myung
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Patent number: 9043677Abstract: A method of operating a memory controller to control a memory device includes reading a read vector from the memory device and correcting one or more errors in the read vector, where a power consumed at the correcting is varied according to the number of errors in the read vector.Type: GrantFiled: March 3, 2014Date of Patent: May 26, 2015Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: JaePhil Kong, Yongwon Cho, Jong-Uk Song
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Publication number: 20140181589Abstract: A method of operating a memory controller to control a memory device includes reading a read vector from the memory device and correcting one or more errors in the read vector, where a power consumed at the correcting is varied according to the number of errors in the read vector.Type: ApplicationFiled: March 3, 2014Publication date: June 26, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: JaePhil KONG, Yongwon CHO, Jong-Uk SONG
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Publication number: 20140068946Abstract: Disclosed is a method of enhancing fire resistance of high-strength concrete by mixing a spalling reducer (fiber cocktail) into the concrete to control spalling and performing shear reinforcement of main steel bars using shear stiffeners based on a wire rope and spacers.Type: ApplicationFiled: September 5, 2013Publication date: March 13, 2014Applicant: KOREA INSTITUTE OF CONSTRUCTION TECHNOLOGYInventors: HEUNG-YOUL KIM, HYUNG-JUN KIM, IN-HWAN YEO, BUM-YEAN CHO, JONG-UK SONG, DAE-BONG JU
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Patent number: 8667369Abstract: A method of operating a memory controller to control a memory device includes reading a read vector from the memory device and correcting one or more errors in the read vector, where a power consumed at the correcting is varied according to the number of errors in the read vector.Type: GrantFiled: May 8, 2012Date of Patent: March 4, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: JaePhil Kong, Yongwon Cho, Jong-uk Song
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Patent number: 8471616Abstract: A duty ratio correction circuit for correcting a duty ratio of a clock signal. The duty ratio correction circuit includes an asymmetry buffer that receives a clock signal and adjusts a duty ratio of the clock signal in response to control signals; a clock generating circuit that is connected to the asymmetry buffer and detects the duty ratio of the clock signal; and a controller that generates the control signals according to the duty ratio of the clock signal. An operation of the controller is recorded as a program on a computer-readable recording medium.Type: GrantFiled: June 26, 2012Date of Patent: June 25, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Young-wook Kim, Soon-bok Jang, Jong-uk Song, Hwa-seok Oh, Sung-ha Kim
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Publication number: 20130094312Abstract: A voltage scaling device of a semiconductor memory device, the voltage scaling device including: a delay tester for determining the number of delay cells of a delay locked loop (DLL) required to cumulatively delay a clock signal having a constant frequency, and which is input to the DLL, by one clock period; a temperature sensor for measuring the temperature of the semiconductor memory device; and a voltage regulator for regulating a supply voltage of a voltage source which provides a chip voltage to the semiconductor memory device in response to the temperature measured by the temperature sensor and a locking value corresponding to the number of delay cells calculated by the delay tester.Type: ApplicationFiled: August 14, 2012Publication date: April 18, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: SOON-BOK JANG, JONG-UK SONG, YOUNG-WOOK KIM, HWA-SEOK OH
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Publication number: 20130015897Abstract: A duty ratio correction circuit for correcting a duty ratio of a clock signal. The duty ratio correction circuit includes an asymmetry buffer that receives a clock signal and adjusts a duty ratio of the clock signal in response to control signals; a clock generating circuit that i s connected to the asymmetry buffer and detects the duty ratio of the clock signal; and a controller that generates the control signals according to the duty ratio of the clock signal. An operation of the controller is recorded as a program on a computer-readable recording medium.Type: ApplicationFiled: June 26, 2012Publication date: January 17, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Young-wook KIM, Soon-bok JANG, Jong-uk SONG, Hwa-seok OH, Sung-ha KIM
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Publication number: 20130016559Abstract: A NAND flash memory device comprises a NAND flash memory comprising a first pad and a plurality of second pads. The first pad comprises a first receiver configured to receive a first signal. The second pads comprise a plurality of respective second receivers configured to receive a plurality of respective second signals. The second receivers are selectively powered, i.e., turned on or off, according to a logic level of the first signal.Type: ApplicationFiled: July 12, 2012Publication date: January 17, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: JONG-UK SONG, SOON-BOK JANG, YOUNG-WOOK KIM, HYUN-JIN KIM
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Publication number: 20120290896Abstract: A method of operating a memory controller to control a memory device includes reading a read vector from the memory device and correcting one or more errors in the read vector, where a power consumed at the correcting is varied according to the number of errors in the read vector.Type: ApplicationFiled: May 8, 2012Publication date: November 15, 2012Inventors: JaePhil KONG, Yongwon CHO, Jong-uk SONG
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Patent number: 8230303Abstract: A data processing method of a memory system including a flash memory, which includes judging whether data initially read from a selected page of the flash memory is correctable. If the initially read data is judged not to be correctable, the data is newly read from the selected page based upon each of newly determined read voltages. Thereafter, error-free sub-sectors of the newly read data are collected based upon EDC data corresponding to the initially read data. The data of the error-free sub-sectors are then corrected based upon ECC data corresponding to the initially read data.Type: GrantFiled: July 30, 2009Date of Patent: July 24, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Jin-Hyeok Choi, Hwaseok Oh, Jong-uk Song
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Publication number: 20100217920Abstract: The memory system includes a flash memory and a memory controller. The flash memory has at least two addresses with different program times. The memory controller is configured to control the flash memory. The memory controller is configured to assign an address corresponding to a shorter program time from among the at least two addresses for a write operation executed at interruption of a power supply to the flash memory. The assigned address is used to store data of the memory controller in the flash memory.Type: ApplicationFiled: December 18, 2009Publication date: August 26, 2010Inventor: Jong-uk Song
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Publication number: 20100064200Abstract: A data processing method of a memory system including a flash memory, which includes judging whether data initially read from a selected page of the flash memory is correctable. If the initially read data is judged not to be correctable, the data is newly read from the selected page based upon each of newly determined read voltages. Thereafter, error-free sub-sectors of the newly read data are collected based upon EDC data corresponding to the initially read data. The data of the error-free sub-sectors are then corrected based upon ECC data corresponding to the initially read data.Type: ApplicationFiled: July 30, 2009Publication date: March 11, 2010Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: JinHyeok Choi, Hwaseok Oh, Jong-uk Song