Abstract: An apparatus for predicting performance of a wheel in a vehicle: includes a learning device that generates a latent space for a plurality of two-dimensional (2D) wheel images based on a convolutional autoencoder (CAE), extracts a predetermined number of the plurality of 2D wheel images from the latent space, and learns a dataset having the plurality of 2D wheel images and performance values corresponding to the plurality of 2D wheel images; and a controller that predicts performance for the plurality of 2D wheel images based on a performance prediction model obtained by the learning device.

Abstract: The present invention relates to a method and system for providing language learning services. The method of providing language learning services, according to the present invention, the method may include: activating, in response to receiving an input for acquiring a learning target image through a user terminal, a camera of the user terminal; specifying at least a portion of an image taken by the camera as the learning target image; receiving language learning information for the learning target image from a server; providing the language learning information to the user terminal; and storing, based on a request for storing of the language learning information, the language learning information in association with the learning target image, such that the learning target image is used in conjunction with learning of the language learning information.

Abstract: An electronic device includes: a memory device; a nonvolatile memory configured to store a plurality of first configuration parameters respectively corresponding to operating voltages of the memory device and a plurality of second configuration parameters respectively corresponding to operating temperatures of the memory device; and a memory controller configured to: determine a value of a third configuration parameter corresponding to an operating voltage of the memory device among the plurality of first configuration parameters stored in the nonvolatile memory without performing a training operation, determine a value of a fourth configuration parameter corresponding to an operating temperature of the memory device among the plurality of second configuration parameters stored in the nonvolatile memory without performing the training operation, and drive the memory device according to the determined values of the third and the fourth configuration parameters.

Abstract: An electronic device includes: a memory device; a nonvolatile memory configured to store a plurality of first configuration parameters respectively corresponding to operating voltages of the memory device and a plurality of second configuration parameters respectively corresponding to operating temperatures of the memory device; and a memory controller configured to: determine a value of a third configuration parameter corresponding to an operating voltage of the memory device among the plurality of first configuration parameters stored in the nonvolatile memory without performing a training operation, determine a value of a fourth configuration parameter corresponding to an operating temperature of the memory device among the plurality of second configuration parameters stored in the nonvolatile memory without performing the training operation, and drive the memory device according to the determined values of the third and the fourth configuration parameters.

Abstract: A semiconductor memory device including a substrate, a first element isolation film pattern, and a second element isolation film pattern. The substrate includes a first region and a second region. The first element isolation film pattern is in the first region and corresponds to a first active region. The second element isolation film pattern is in the second region and corresponds to a second active region. The first element isolation film pattern includes a first material and the second element isolation film pattern includes a second material different from the first material.

Abstract: Provided is a semiconductor device, including a substrate including a device isolation layer and an active region isolated by the device isolation layer; a trench in the active region; a gate electrode filling at least a portion of the trench; a recess in the substrate at one side of the gate electrode, the recess overlapping a portion of the device isolation layer and the active region; and a lower contact plug filling the recess.

Abstract: Methods of fabricating semiconductor devices are provided including providing a substrate having a first region and a second region, the substrate defining trenches in the first and second regions; forming active fins on the first and second regions, the active fins protruding from the trenches in the first and second regions; forming spacers on sidewalls of the active fins in the first and second regions; recessing floors of the trenches under the spacers to provide extensions of the active fins; implanting impurities of a first type in the extensions of the active fins in the first region; and implanting impurities of a second, type, different from the first type, in the extensions of the active fins in the second region.

Abstract: A semiconductor memory device includes a substrate including cell block, a balancing block, and a sense block. A plurality of cell bit lines are formed in the cell block of. A plurality of cell plugs are formed adjacent to side surfaces of the bit lines. Cell inner spacers, air spacers, and cell outer spacers are formed between the cell bit lines and the cell plugs. A plurality of balancing bit lines are formed in the balancing block. A plurality of balancing plugs are formed adjacent to side surfaces of the balancing bit lines. Balancing inner spacers and balancing outer spacers are formed between the balancing bit lines and the balancing plugs. The balancing bit lines and at least some of the cell bit lines are connected to the sense block.

Abstract: A semiconductor memory device including a substrate, a first element isolation film pattern, and a second element isolation film pattern. The substrate includes a first region and a second region. The first element isolation film pattern is in the first region and corresponds to a first active region. The second element isolation film pattern is in the second region and corresponds to a second active region. The first element isolation film pattern includes a first material and the second element isolation film pattern includes a second material different from the first material.

Abstract: Provided is a semiconductor device, including a substrate including a device isolation layer and an active region isolated by the device isolation layer; a trench in the active region; a gate electrode filling at least a portion of the trench; a recess in the substrate at one side of the gate electrode, the recess overlapping a portion of the device isolation layer and the active region; and a lower contact plug filling the recess.

Abstract: A method of manufacturing a semiconductor device may include: forming active patterns of pillar-shapes upward protruding from a substrate, the active patterns fully doped with dopants of one conductivity type; forming a gate electrode extending in one direction, the gate electrode overlapped with sidewalls of the active patterns; and forming a gate insulating layer between the gate electrode and the active patterns.

Abstract: Methods of fabricating semiconductor devices are provided including providing a substrate having a first region and a second region, the substrate defining trenches in the first and second regions; forming active fins on the first and second regions, the active fins protruding from the trenches in the first and second regions; forming spacers on sidewalls of the active fins in the first and second regions; recessing floors of the trenches under the spacers to provide extensions of the active fins; implanting impurities of a first type in the extensions of the active fins in the first region; and implanting impurities of a second, type, different from the first type, in the extensions of the active fins in the second region.

Abstract: A semiconductor memory device includes a substrate including cell block, a balancing block, and a sense block. A plurality of cell bit lines are formed in the cell block of. A plurality of cell plugs are formed adjacent to side surfaces of the bit lines. Cell inner spacers, air spacers, and cell outer spacers are formed between the cell bit lines and the cell plugs. A plurality of balancing bit lines are formed in the balancing block. A plurality of balancing plugs are formed adjacent to side surfaces of the balancing bit lines. Balancing inner spacers and balancing outer spacers are formed between the balancing bit lines and the balancing plugs. The balancing bit lines and at least some of the cell bit lines are connected to the sense block.

Abstract: In a method of manufacturing a semiconductor device, a trench is formed by removing an upper portion of a substrate. A gate insulation layer pattern is formed on an inner wall of the trench. A gate electrode is formed on the gate insulation layer pattern. The gate electrode fills a lower portion of the trench. A capping layer is formed on the gate electrode and the gate insulation layer pattern. The capping layer is partially oxidized to form a first capping layer pattern and a second capping layer pattern. The first capping layer pattern is not oxidized, and the second capping layer pattern is oxidized. A third capping layer pattern is formed on the second capping layer pattern, the third capping layer pattern filling an upper portion of the trench.

Abstract: A method of manufacturing a semiconductor device may include: forming active patterns of pillar-shapes upward protruding from a substrate, the active patterns fully doped with dopants of one conductivity type; forming a gate electrode extending in one direction, the gate electrode overlapped with sidewalls of the active patterns; and forming a gate insulating layer between the gate electrode and the active patterns.

Abstract: A semiconductor device may include active patterns of pillar-shapes disposed on a substrate and spaced apart from each other in one direction; a gate electrode extending in the one direction and overlapped with sidewalls of the active patterns; a gate insulating layer disposed between the gate electrode and the active patterns; bit lines connected to bottom surfaces of respective active patterns; and/or capacitors connected to top surfaces of the respective active patterns. Each of the active patterns may have no p-type/n-type (PN) junctions. A semiconductor device may include a substrate; active patterns on the substrate that are spaced apart from each other; a gate electrode configured to overlap sidewalls of the active patterns; and/or gate insulating layers between the gate electrode and respective active patterns. The active patterns may be doped with dopants of a same conductivity type.

Abstract: In a method of manufacturing a semiconductor device, a mask is formed on a substrate. The substrate is divided into a first region and a second region. An upper portion of the substrate in the first region is partially removed using the mask as an etching mask to form a recess. A first gate structure is formed in the recess. A portion of the mask in the first region is removed. A blocking layer pattern is formed on the substrate in the first region over the first gate structure.

Abstract: Provided is an automotive lamp, and more particularly, an automotive lamp which can secure a forward long-range field of view without requiring an additional light source. The automotive lamp having a plurality of light distribution patterns of Class-W, Class-V, Class-C, Class-E, and High and includes: a plurality of lamp units in which light-emitting diodes (LEDs) turned on or off according to each of the light distribution patterns or having different illumination patterns are installed; an actuator driving the lamp units; and a controller enabling a switch from any one of the light distribution patterns to another one of the light distribution patterns by controlling at least one of the actuator and a value of current supplied to each of the lamp units.

Abstract: A semiconductor device may include active patterns of pillar-shapes disposed on a substrate and spaced apart from each other in one direction; a gate electrode extending in the one direction and overlapped with sidewalls of the active patterns; a gate insulating layer disposed between the gate electrode and the active patterns; bit lines connected to bottom surfaces of respective active patterns; and/or capacitors connected to top surfaces of the respective active patterns. Each of the active patterns may have no p-type/n-type (PN) junctions. A semiconductor device may include a substrate; active patterns on the substrate that are spaced apart from each other; a gate electrode configured to overlap sidewalls of the active patterns; and/or gate insulating layers between the gate electrode and respective active patterns. The active patterns may be doped with dopants of a same conductivity type.

Abstract: A semiconductor device includes a word line and a bit line on a substrate and the word line intersects the bit line, an insulating layer on the substrate and the insulating layer includes voids therein, and a passivation layer on the insulating layer and the passivation layer includes hydrogen atoms therein. The voids define diffusion pathways through which the hydrogen atoms in the passivation layer diffuse in a direction toward the substrate.