Abstract: A display device includes: a first substrate including a pixel area and a transmissive area; a thin-film transistor on the first substrate; a planarization layer on the thin-film transistor; a first light emitting electrode on the planarization layer; a bank covering a part of the first light emitting electrode; a light emitting layer on the first light emitting electrode; and a second light emitting electrode on the light emitting layer and the bank. The transmissive area includes a transmissive hole penetrating the bank and the planarization layer.

Abstract: According to a CMOS image device and a method of manufacturing same, dark current is decreased by a local impurity region. The image device includes a semiconductor substrate, and a transfer gate formed on a predetermined portion of the semiconductor substrate and electrically insulated from the semiconductor substrate. A photodiode is formed in the semiconductor substrate on one side of the transfer gate, and a floating diffusion region is formed on the semiconductor substrate in the other side of the transfer gate. A local impurity region of a first conductivity type is formed to be partially overlapped the transfer gate between the photodiode and the floating diffusion region.

Abstract: A CMOS image sensor cell includes a semiconductor active region of first conductivity type having a surface thereon and a P-N junction photodiode in the active region. A drive transistor is also provided in the semiconductor active region. The drive transistor has a gate electrode that is configured to receive charge generated in the P-N junction photodiode during an image capture operation (i.e., during capture of photons received from an image). This drive transistor has a gate electrode and a contoured channel region extending underneath the gate electrode. The contoured channel region has an effective channel length greater than a length of the gate electrode.

Abstract: An image sensor may include a semiconductor substrate having a pixel array region and a logic region. A first gate electrode may be formed on the pixel array region of the semiconductor substrate. A lower electrode may be formed on a portion of the logic region of the semiconductor substrate. A first capping layer may be formed on at least a portion of the lower electrode. A dielectric layer may be formed on the first capping layer. An upper electrode may be formed on the dielectric layer. The first gate electrode and the lower electrode may include a polysilicon layer, and the first capping layer may include at least one of a metal layer and a metal silicide layer.

Abstract: An image sensor and a method of fabricating the image sensor are provided. The image sensor includes a semiconductor substrate having a first conductivity type, a deep well having a second conductivity type. The deep well is formed at a predetermined depth in the semiconductor substrate to divide the semiconductor substrate into a first conductivity type upper substrate area and a lower substrate area. The image sensor further includes a plurality of unit pixels integrating charges corresponding to incident light and comprising first conductivity type ion-implantation areas. The first conductivity type ion-implantation areas are separated from one another. Moreover, at least one unit pixel among the plurality of unit pixels further comprises the first conductivity type upper substrate area that is positioned under a first conductivity type ion-implantation area included in the unit pixel.

Abstract: According to a CMOS image device and a method of manufacturing same, dark current is decreased by a local impurity region. The image device includes a semiconductor substrate, and a transfer gate formed on a predetermined portion of the semiconductor substrate and electrically insulated from the semiconductor substrate. A photodiode is formed in the semiconductor substrate on one side of the transfer gate, and a floating diffusion region is formed on the semiconductor substrate in the other side of the transfer gate. A local impurity region of a first conductivity type is formed to be partially overlapped the transfer gate between the photodiode and the floating diffusion region.

Abstract: An image sensor is provided. The image sensor includes a substrate; a first isolation region, a second isolation region, a plurality of photoelectric transducer devices, a read element and a floating diffusion region. The second isolation region has a depth that is less than that of the first isolation region. The plurality of photoelectric transducer devices is isolated from one another by the first isolation region. The read element and the floating diffusion region are isolated from the photoelectric transducer devices by the second isolation region.

Abstract: According to a CMOS image device and a method of manufacturing same, dark current is decreased by a local impurity region. The image device includes a semiconductor substrate, and a transfer gate formed on a predetermined portion of the semiconductor substrate and electrically insulated from the semiconductor substrate. A photodiode is formed in the semiconductor substrate on one side of the transfer gate, and a floating diffusion region is formed on the semiconductor substrate in the other side of the transfer gate. A local impurity region of a first conductivity type is formed to be partially overlapped the transfer gate between the photodiode and the floating diffusion region.

Abstract: An image sensor is provided. The image sensor includes a substrate; a first isolation region, a second isolation region, a plurality of photoelectric transducer devices, a read element and a floating diffusion region. The second isolation region has a depth that is less than that of the first isolation region. The plurality of photoelectric transducer devices is isolated from one another by the first isolation region. The read element and the floating diffusion region are isolated from the photoelectric transducer devices by the second isolation region.

Abstract: An image sensor may include a semiconductor substrate having a pixel array region and a logic region. A first gate electrode may be formed on the pixel array region of the semiconductor substrate. A lower electrode may be formed on a portion of the logic region of the semiconductor substrate. A first capping layer may be formed on at least a portion of the lower electrode. A dielectric layer may be formed on the first capping layer. An upper electrode may be formed on the dielectric layer. The first gate electrode and the lower electrode may include a polysilicon layer, and the first capping layer may include at least one of a metal layer and a metal silicide layer.

Abstract: A CMOS image sensor cell includes a semiconductor active region of first conductivity type having a surface thereon and a P-N junction photodiode in the active region. A drive transistor is also provided in the semiconductor active region. The drive transistor has a gate electrode that is configured to receive charge generated in the P-N junction photodiode during an image capture operation (i.e., during capture of photons received from an image). This drive transistor has a gate electrode and a contoured channel region extending underneath the gate electrode. The contoured channel region has an effective channel length greater than a length of the gate electrode.

Abstract: According to a CMOS image device and a method of manufacturing same, dark current is decreased by a local impurity region. The image device includes a semiconductor substrate, and a transfer gate formed on a predetermined portion of the semiconductor substrate and electrically insulated from the semiconductor substrate. A photodiode is formed in the semiconductor substrate on one side of the transfer gate, and a floating diffusion region is formed on the semiconductor substrate in the other side of the transfer gate. A local impurity region of a first conductivity type is formed to be partially overlapped the transfer gate between the photodiode and the floating diffusion region.

Abstract: An image sensor and a method of fabricating the image sensor are provided. The image sensor includes a semiconductor substrate having a first conductivity type, a deep well having a second conductivity type. The deep well is formed at a predetermined depth in the semiconductor substrate to divide the semiconductor substrate into a first conductivity type upper substrate area and a lower substrate area. The image sensor further includes a plurality of unit pixels integrating charges corresponding to incident light and comprising first conductivity type ion-implantation areas. The first conductivity type ion-implantation areas are separated from one another. Moreover, at least one unit pixel among the plurality of unit pixels further comprises the first conductivity type upper substrate area that is positioned under a first conductivity type ion-implantation area included in the unit pixel.

Abstract: The claimed invention relates to a semiconductor device and a method of fabricating the semiconductor device. More particularly, the claimed invention relates to a method of fabricating the semiconductor device in which parts of a gate electrode at the ends of a channel are lightly doped compared to the center part of the gate electrode, thereby eliminating a hump on a subthreshold current slope. To achieve the objects of the claimed invention, there is provided a semiconductor device that includes a semiconductor substrate divided into an isolation region and an active region. A gate oxide film is formed on a first upper surface of the active region. A gate electrode is formed on a second upper surface of the gate oxide film, the gate electrode having a first part and a second part. The first part is more lightly doped with impurities than the second part. A channel is formed in an upper end of the active region proximate the gate electrode.

Abstract: The claimed invention relates to a semiconductor device and a method of fabricating the semiconductor device. More particularly, the claimed invention relates to a method of fabricating the semiconductor device in which parts of a gate electrode at the ends of a channel are lightly doped compared to the center part of the gate electrode, thereby eliminating a hump on a subthreshold current slope. To achieve the objects of the claimed invention, there is provided a semiconductor device that includes a semiconductor substrate divided into an isolation region and an active region. A gate oxide film is formed on a first upper surface of the active region. A gate electrode is formed on a second upper surface of the gate oxide film, the gate electrode having a first part and a second part. The first part is more lightly doped with impurities than the second part. A channel is formed in an upper end of the active region proximate the gate electrode.

Abstract: The claimed invention relates to a semiconductor device and a method of fabricating the semiconductor device. More particularly, the claimed invention relates to a method of fabricating the semiconductor device in which parts of a gate electrode at the ends of a channel are lightly doped compared to the center part of the gate electrode, thereby eliminating a hump on a subthreshold current slope. To achieve the objects of the claimed invention, there is provided a semiconductor device that includes a semiconductor substrate divided into an isolation region and an active region. A gate oxide film is formed on a first upper surface of the active region. A gate electrode is formed on a second upper surface of the gate oxide film, the gate electrode having a first part and a second part. The first part is more lightly doped with impurities than the second part. A channel is formed in an upper end of the active region proximate the gate electrode.

Abstract: A method for fabricating a semiconductor device including the steps of: forming a gate insulation film on the upper surface of a semiconductor substrate; forming a dummy layer pattern on the upper surface of the gate insulation film; forming an insulating side wall spacer on both side walls of the dummy layer pattern; injecting an impurity ion into the semiconductor substrate of the both sides of the side wall spacer, to form a source and a drain; forming an insulation layer in a manner that the entire upper surface of the semiconductor substrate becomes higher than the dummy layer pattern; performing a chemical-mechanical polishing step, to expose the upper surface of the dummy layer pattern; etching the dummy layer pattern and forming a trench on the gate insulation film; forming a barrier film on the inner wall of the trench and on the upper surface of the insulation layer; and filling the trench with copper layer.

Abstract: The claimed invention relates to a semiconductor device and a method of fabricating the semiconductor device. More particularly, the claimed invention relates to a method of fabricating the semiconductor device in which parts of a gate electrode at the ends of a channel are lightly doped compared to the center part of the gate electrode, thereby eliminating a hump on a subthreshold current slope. To achieve the objects of the claimed invention, there is provided a semiconductor device that includes a semiconductor substrate divided into an isolation region and an active region. A gate oxide film is formed on a first upper surface of the active region. A gate electrode is formed on a second upper surface of the gate oxide film, the gate electrode having a first part and a second part. The first part is more lightly doped with impurities than the second part. A channel is formed in an upper end of the active region proximate the gate electrode.

Abstract: A method for fabricating a semiconductor device includes the steps of forming a field oxide layer on a field region of a semiconductor substrate where a field region and an active region are defined, forming a polycide layer on the entire surface of the semiconductor substrate including the field oxide layer and selectively removing the polycide layer to form a gate electrode and a lower electrode of a capacitor, successively forming a dielectric layer and a polysilicon layer on the entire surface including the lower electrode of the capacitor and patterning the dielectric layer and the lower electrode to form an upper electrode pattern and a resistor pattern, and forming an insulating layer to cover the resistor pattern and forming another polycide layer on the upper electrode of the capacitor.

Abstract: A method for fabricating a semiconductor device includes forming a plurality of field oxide layers on a semiconductor substrate to define an active region; forming a plurality of gate electrodes each having sidewall spacers on the active region of the semiconductor substrate, depositing a metal layer on the semiconductor substrate including the plurality of gate electrodes, defining a first region and a second region, removing the metal layer over the second region, and forming a silicide layer on the gate electrode and on the semiconductor substrate over the first region with a first annealing process.