Patents by Inventor Jong-Woon Yoo

Jong-Woon Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10855185
    Abstract: A semiconductor circuit includes a reference voltage generating circuit which generates a first reference voltage; a voltage control circuit which receives the first reference voltage from the reference voltage generating circuit to output a second reference voltage; a DC-DC conversion circuit which executes DC-DC conversion on the basis of the second reference voltage which is output from the voltage control circuit, and provides an output thereof to a first node; and a voltage regulator which executes voltage regulating on the basis of the first reference voltage which is output from the reference voltage generating circuit, and a voltage of the first node, and provides an output thereof to a second node.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: December 1, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki Jae Song, Jong Woon Yoo
  • Publication number: 20200083810
    Abstract: A semiconductor circuit includes a reference voltage generating circuit which generates a first reference voltage; a voltage control circuit which receives the first reference voltage from the reference voltage generating circuit to output a second reference voltage; a DC-DC conversion circuit which executes DC-DC conversion on the basis of the second reference voltage which is output from the voltage control circuit, and provides an output thereof to a first node; and a voltage regulator which executes voltage regulating on the basis of the first reference voltage which is output from the reference voltage generating circuit, and a voltage of the first node, and provides an output thereof to a second node.
    Type: Application
    Filed: April 25, 2019
    Publication date: March 12, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ki Jae SONG, Jong Woon YOO
  • Patent number: 10551434
    Abstract: A rechargeable power module (RPM) may include a rechargeable energy storage device such as a battery or capacitor, a charging circuit, a direct-current (DC) to DC converter, a low drop-out (LDO) voltage regulator and a controller. The charging circuit provides the rechargeable energy storage device with a charging current based on power requirements of device under test and the state of charge, or storage, of the energy storage device.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: February 4, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Woon Yoo, Ki-Jae Song, Soo-Yong Park
  • Publication number: 20170343605
    Abstract: A rechargeable power module (RPM) may include a rechargeable energy storage device such as a battery or capacitor, a charging circuit, a direct-current (DC) to DC converter, a low drop-out (LDO) voltage regulator and a controller. The charging circuit provides the rechargeable energy storage device with a charging current based on power requirements of device under test and the state of charge, or storage, of the energy storage device.
    Type: Application
    Filed: August 11, 2017
    Publication date: November 30, 2017
    Inventors: Jong-Woon Yoo, Ki-Jae Song, Soo-Yong Park
  • Patent number: 9759769
    Abstract: A rechargeable power module (RPM) may include a rechargeable energy storage device such as a battery or capacitor, a charging circuit, a direct-current (DC) to DC converter, a low drop-out (LDO) voltage regulator and a controller. The charging circuit provides the rechargeable energy storage device with a charging current based on power requirements of device under test and the state of charge, or storage, of the energy storage device.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: September 12, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Woon Yoo, Ki-Jae Song, Soo-Yong Park
  • Patent number: 9612276
    Abstract: A test device includes a test unit and a voltage selection circuit. The test unit is configured to detect a voltage at a test pad of a semiconductor device under test by applying a test current to the test pad. The voltage selection circuit is configured to apply a selection voltage to a ground pad of the semiconductor device under test by selecting one of a plurality of voltages according to a test mode.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: April 4, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-Woon Yoo, Sang-Kyeong Han, Ung-Jin Jang, Ki-Jae Song
  • Patent number: 9513333
    Abstract: A test interface board includes a substrate including a power plane electrically connected to at least one power terminal of a semiconductor device under test, and a ground plane electrically connected to at least one ground terminal of the semiconductor device under test, and a voltage regulator arranged on the substrate and configured to supply, via the power plane and the ground plane, to the semiconductor device under test, a driving voltage.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: December 6, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-Jae Song, Jong-woon Yoo
  • Publication number: 20160131709
    Abstract: A rechargeable power module (RPM) may include a rechargeable energy storage device such as a battery or capacitor, a charging circuit, a direct-current (DC) to DC converter, a low drop-out (LDO) voltage regulator and a controller. The charging circuit provides the rechargeable energy storage device with a charging current based on power requirements of device under test and the state of charge, or storage, of the energy storage device.
    Type: Application
    Filed: June 2, 2015
    Publication date: May 12, 2016
    Inventors: Jong-Woon Yoo, Ki-Jae Song, Soo-Yong Park
  • Publication number: 20150070041
    Abstract: A test interface board includes a substrate including a power plane electrically connected to at least one power terminal of a semiconductor device under test, and a ground plane electrically connected to at least one ground terminal of the semiconductor device under test, and a voltage regulator arranged on the substrate and configured to supply, via the power plane and the ground plane, to the semiconductor device under test, a driving voltage.
    Type: Application
    Filed: August 12, 2014
    Publication date: March 12, 2015
    Inventors: Ki-Jae SONG, Jong-woon YOO
  • Publication number: 20150054532
    Abstract: A test device includes a test unit and a voltage selection circuit. The test unit is configured to detect a voltage at a test pad of a semiconductor device under test by applying a test current to the test pad. The voltage selection circuit is configured to apply a selection voltage to a ground pad of the semiconductor device under test by selecting one of a plurality of voltages according to a test mode.
    Type: Application
    Filed: June 9, 2014
    Publication date: February 26, 2015
    Inventors: Jong-Woon YOO, Sang-Kyeong HAN, Ung-Jin JANG, Ki-Jae SONG
  • Publication number: 20140253099
    Abstract: A semiconductor device, which is mounted on a device interface board to interface an electrical measuring signal between automated test equipment (ATE) and a device under test (DUT), includes an AC test unit, a DC test unit, a first input/output (I/O) interface unit, and a second I/O interface unit. The AC test unit tests an AC characteristic of the DUT. The DC test unit provides a DC test path according to attributes of I/O terminals of the DUT. The first I/O interface unit selectively connects the AC test unit or the DC test unit to the ATE in response to a mode control signal. The second I/O interface unit selectively connects the AC test unit or the DC test unit to the DUT in response to the mode control signal.
    Type: Application
    Filed: March 6, 2014
    Publication date: September 11, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Kyeong HAN, Jong-Woon YOO, Ung-Jin JANG
  • Publication number: 20130342236
    Abstract: A test interface board comprises at least one switch matrix including a plurality of switching elements that connect a plurality of connection nodes to each other. The at least one switch matrix is configured to connect a plurality of channels of an automatic test equipment (ATE) to respective pin positions corresponding to a device under test (DUT) in response to switching control signals. The plurality of channels provide test operation signals for testing the DUT. A control logic is configured to generate the switching control signals based on pin configuration information of the DUT.
    Type: Application
    Filed: March 14, 2013
    Publication date: December 26, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-Jae Song, Jong-Woon Yoo, Sang-Kyeong Han, Gil-Beag Kim