Abstract: A display apparatus includes a switching element having a first gate electrode, a source and drain electrode, a channel area formed between the source and drain electrode, and a second gate electrode. The second gate electrode is electrically insulated from the first gate electrode through the channel area, and different control voltages are applied to the second gate electrode according to the control period of the first gate electrode. The different control voltages are applied to the second gate electrode according to the turn on/off states of the switching element for increasing the turn on current in the channel area and for minimizing the turn off (leakage) current in the channel area.

Abstract: A display panel includes a substrate, signal lines, a thin film transistor, a pixel electrode and a dummy opening. The substrate has a display area and a peripheral area surrounding the display area. The signal lines are disposed on the substrate and intersect each other to define a unit pixel. The thin film transistor is electrically connected to the signal lines and disposed at the unit pixel. The pixel electrode is electrically connected to the thin film transistor. The pixel electrode is formed in the unit pixel. The dummy opening is disposed at the peripheral area and spaced apart from the signal lines.

Abstract: A display substrate includes an insulating substrate, a thin-film transistor (TFT), a pixel electrode, a signal line and a pad part. The insulating substrate has a display region and a peripheral region surrounding the display region. The TFT is in the display region of the insulating substrate. The pixel electrode is in the display region of the insulating substrate and electrically connected to the TFT. The signal line is on the insulating substrate and extends from the peripheral region toward the display region. The pad part is in the peripheral region and electrically connects to the signal line. The pad part is formed in a trench of the insulating substrate and includes a region that extends into the insulating substrate. Therefore, the signal line may be securely attached to the insulating substrate.

Abstract: A display substrate having a fan-out and a method for manufacturing the display substrate are disclosed. The fan-out includes an insulating substrate, a first line, a second line, a resistance control pattern, and first and second detour pattern. The first line is disposed on the insulating substrate and is connected to a pad. The second line is formed from the same layer as the first line and is connected to a thin-film transistor (TFT). The resistance control pattern is formed from a different layer than the first and second lines. The first and second detour patterns are formed from a different layer than the first and second lines and the resistance control pattern, and connect the first and second lines with the resistance control pattern, respectively.

Abstract: A display substrate includes a first metal pattern, a first insulating layer, a first electrode, and a second metal pattern. The first metal pattern includes a gate line and a signal line. The first insulating layer is disposed on a substrate having the first metal pattern formed thereon. A first opening passes through the first insulating layer to partially expose the signal line. The first electrode is disposed on the first insulating layer corresponding to a unit pixel. The second metal pattern includes a connection electrode contacting the first electrode and the signal line through the first opening and a data line.

Abstract: A TFT array panel includes: first and second gate members connected to each other; a gate insulating layer formed on the first and the second gate members; first and second semiconductor members formed on the gate insulating layer opposite the first and the second gate members, respectively; first and second source members connected to each other and located near the first and the second semiconductor members, respectively; first and second drain members located near the first and the second semiconductor members, respectively, and located opposite the first and the second source members with respect to the first and the second gate members, respectively; and a pixel electrode connected to the first and the second drain members. The first gate, semiconductor, source, and drain members form a first TFT, and the second gate, semiconductor, source, and drain members form a second TFT.

Abstract: A thin film transistor array and method of manufacturing the same include a pixel electrode formed of a transparent conductive layer on a substrate, a gate line formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate electrode connected to the gate line and formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate insulating layer which covers the gate line and the gate electrode, a semiconductor layer formed on the gate insulating layer to overlap the gate electrode, a data line which intersects the gate line, a source electrode connected to the data line to overlap a part of the semiconductor layer, and a drain electrode connected to the pixel electrode to overlap a part of the semiconductor layer.

Abstract: A multi-tone optical mask includes a substrate, a light-blocking pattern, a first semi-transmitting pattern and a second semi-transmitting pattern. The light-blocking pattern is formed on the substrate. The first semi-transmitting pattern is formed on the substrate. The second semi-transmitting pattern partially overlaps the first semi-transmitting pattern. The multi-tone optical mask has at least five different light-transmittances corresponding to a plurality of areas divided on the substrate.

Abstract: A display substrate includes a first metal pattern, a first insulating layer, a first electrode, and a second metal pattern. The first metal pattern includes a gate line and a signal line. The first insulating layer is disposed on a substrate having the first metal pattern formed thereon. A first opening passes through the first insulating layer to partially expose the signal line. The first electrode is disposed on the first insulating layer corresponding to a unit pixel. The second metal pattern includes a connection electrode contacting the first electrode and the signal line through the first opening and a data line.

Abstract: An array substrate of a liquid crystal display device having a color filter on a gate metal layer, and a data metal layer formed on the color filter. First a gate insulating layer is formed on the gate metal layer to protect and a second gate insulating layer is formed on the color filter layer. Gate lines and gate electrodes are formed in direct contact with the substrate, and color filters are formed on the gate electrodes. To protect gate lines in the patterning process of color filters, a first gate insulating layer is formed on the gate lines and electrodes. Therefore, a high aperture ratio may be enhanced, and the manufacturing yield may be increased.

Abstract: A thin film transistor array and method of manufacturing the same include a pixel electrode formed of a transparent conductive layer on a substrate, a gate line formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate electrode connected to the gate line and formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate insulating layer which covers the gate line and the gate electrode, a semiconductor layer formed on the gate insulating layer to overlap the gate electrode, a data line which intersects the gate line, a source electrode connected to the data line to overlap a part of the semiconductor layer, and a drain electrode connected to the pixel electrode to overlap a part of the semiconductor layer.

Abstract: A display substrate includes a first metal pattern, a first insulating layer, a first electrode, and a second metal pattern. The first metal pattern includes a gate line and a signal line. The first insulating layer is disposed on a substrate having the first metal pattern formed thereon. A first opening passes through the first insulating layer to partially expose the signal line. The first electrode is disposed on the first insulating layer corresponding to a unit pixel. The second metal pattern includes a connection electrode contacting the first electrode and the signal line through the first opening and a data line.

Abstract: A display substrate includes an insulating substrate, a thin film transistor, a contact electrode, and a pixel electrode. The thin film transistor includes a control electrode, a semiconductor pattern, a first electrode, and a second electrode. The control electrode is on the insulating substrate. The semiconductor pattern is on the control electrode. The first electrode is on the semiconductor pattern. The second electrode is spaced apart from the first electrode on the semiconductor pattern. The contact electrode includes a contact portion and an undercut portion. The contact portion is electrically connected to the second electrode to partially expose the semiconductor pattern. The undercut portion is electrically connected to the contact portion to cover the semiconductor pattern. The pixel electrode is electrically connected to the second electrode through the contact portion of the contact electrode.

Abstract: A plurality of gate lines having gate electrodes are formed on a substrate and a semiconductor layer is formed on a gate insulating layer covering the gate lines. A plurality of data lines intersecting the gate lines are formed on the gate insulating layer and a plurality of drain electrodes are formed extending parallel with and adjacent to the data lines. Furthermore, a plurality of storage capacitor conductors are formed to be connected to the drain electrodes and to overlap an adjacent gate line. A passivation layer made of an organic material is formed on the above structure and has a contact hole. Furthermore, a plurality of pixel electrodes are formed to be electrically connected to the drain electrodes through the contact hole.

Abstract: A plurality of gate lines having gate electrodes are formed on a substrate and a semiconductor layer is formed on a gate insulating layer covering the gate lines. A plurality of data lines intersecting the gate lines are formed on the gate insulating layer and a plurality of drain electrodes are formed extending parallel with and adjacent to the data lines. Furthermore, a plurality of storage capacitor conductors are formed to be connected to the drain electrodes and to overlap an adjacent gate line. A passivation layer made of an organic material is formed on the above structure and has a contact hole. Furthermore, a plurality of pixel electrodes are formed to be electrically connected to the drain electrodes through the contact hole.

Abstract: A method of manufacturing a TFT substrate includes: sequentially forming a transparent conductive layer and an opaque conductive layer on a substrate, patterning the transparent conductive layer and the opaque conductive layer by using a first mask to form a gate pattern including a pixel electrode, and forming a gate insulating layer and a semiconductor layer above the substrate. A contact hole is formed which exposes a portion of the pixel electrode and a semiconductor pattern using a second mask. A conductive layer is formed above the substrate and patterned to form a source/drain pattern including a drain electrode which overlaps a portion of the pixel electrode. Portions of the gate insulating layer and the opaque conductive layer above the pixel electrode are removed except a portion overlapping the drain electrode, by using a third mask.

Abstract: An array substrate of a liquid crystal display device having a color filter on a gate metal layer, and a data metal layer formed on the color filter. First a gate insulating layer is formed on the gate metal layer to protect and a second gate insulating layer is formed on the color filter layer. Gate lines and gate electrodes are formed in direct contact with the substrate, and color filters are formed on the gate electrodes. To protect gate lines in the patterning process of color filters, a first gate insulating layer is formed on the gate lines and electrodes. Therefore, a high aperture ratio may be enhanced, and the manufacturing yield may be increased.

Abstract: A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.

Abstract: The display device includes a substrate, a thin film transistor (TFT), which includes a gate electrode, a semiconductor layer, and source and drain electrodes, on the substrate member, a passivation layer on the TFT and having an opening to expose a portion of the drain electrode, and a pixel electrode directly on the drain electrode and only within the opening.

Abstract: A display substrate includes an insulating substrate, a thin film transistor, a contact electrode, and a pixel electrode. The thin film transistor includes a control electrode, a semiconductor pattern, a first electrode, and a second electrode. The control electrode is on the insulating substrate. The semiconductor pattern is on the control electrode. The first electrode is on the semiconductor pattern. The second electrode is spaced apart from the first electrode on the semiconductor pattern. The contact electrode includes a contact portion and an undercut portion. The contact portion is electrically connected to the second electrode to partially expose the semiconductor pattern. The undercut portion is electrically connected to the contact portion to cover the semiconductor pattern. The pixel electrode is electrically connected to the second electrode through the contact portion of the contact electrode.