Abstract: Disclosed is a method of manufacturing semiconductor devices. A gate trench and an insulation pattern defined by the gate trench are formed on a substrate and the protection pattern is formed on the insulation pattern. A gate dielectric layer, a work function metal layer and a sacrificial layer are sequentially formed the substrate along a surface profile of the gate trench. A sacrificial pattern is formed by a CMP while not exposing the insulation pattern. A residual sacrificial pattern is formed at a lower portion of the gate trench and the gate dielectric layer and the work function metal layer is etched into a gate dielectric pattern and a work function metal pattern using the residual sacrificial pattern as an etch stop layer.

Abstract: Disclosed is a method of manufacturing semiconductor devices. A gate trench and an insulation pattern defined by the gate trench are formed on a substrate and the protection pattern is formed on the insulation pattern. A gate dielectric layer, a work function metal layer and a sacrificial layer are sequentially formed the substrate along a surface profile of the gate trench. A sacrificial pattern is formed by a CMP while not exposing the insulation pattern. A residual sacrificial pattern is formed at a lower portion of the gate trench and the gate dielectric layer and the work function metal layer is etched into a gate dielectric pattern and a work function metal pattern using the residual sacrificial pattern as an etch stop layer.

Abstract: A method of controlling a semiconductor device manufacturing process for a product which is newly applied and a control system for the same process are provided. According to an embodiment on the control method, a sample process time for a product applied to the semiconductor device manufacturing process for the first time is calculated. The semiconductor device manufacturing process is performed based on the calculated sample process time. Then, a main process time is calculated by applying the stored sample process time to a main process time equation. The semiconductor device manufacturing process can be controlled on the basis of the main process time. The sample process time may be stored in an information storage table.

Abstract: A method of controlling a semiconductor device manufacturing process for a product which is newly applied and a control system for the same process are provided. According to an embodiment on the control method, a sample process time for a product applied to the semiconductor device manufacturing process for the first time is calculated. The semiconductor device manufacturing process is performed based on the calculated sample process time. Then, a main process time is calculated by applying the stored sample process time to a main process time equation. The semiconductor device manufacturing process can be controlled on the basis of the main process time. The sample process time may be stored in an information storage table.