Patents by Inventor Joo-Hyong Lee

Joo-Hyong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6833592
    Abstract: Provided with a semiconductor device including: a semiconductor substrate having a first conductivity type; a first well having a second conductivity type formed in a first region in a major surface of the semiconductor substrate; a second well having the first conductivity type formed in a second region in the major surface of the semiconductor substrate; a first MOS transistor having the first conductivity type and a first contact region having the second conductivity type formed in the first well; a second MOS transistor having the second conductivity type and a second contact region having the second conductivity type formed in the second well; a heavily doped region of buried layer having the second conductivity type formed at a portion corresponding to the first contact region in the first well; and a heavily doped region of buried layer having the first conductivity type formed at a portion corresponding to the second contact region in the second well.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: December 21, 2004
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Joo-Hyong Lee
  • Patent number: 6455402
    Abstract: The method of fabricating a semiconductor device includes the steps of selectively forming an insulating oxide layer in a semiconductor substrate having a first conductivity type, wherein the semiconductor substrate has first and second regions; forming impurity layers having a second conductivity type in the first and second regions of the semiconductor substrate; forming a first mask layer in the second region of the semiconductor substrate; forming impurity layers having the second conductivity type in the first region of the semiconductor substrate by performing serial ion implantations with different doses of dopants at different acceleration energies; forming a second mask layer in the first region of the semiconductor substrate; and forming impurity layers having the first conductivity type in the second region of the semiconductor substrate by performing serial ion implantations with different doses of dopants at different acceleration energies.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: September 24, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Joo-Hyong Lee, Jeong-Hwan Son
  • Publication number: 20020063297
    Abstract: Provided with a semiconductor device including: a semiconductor substrate having a first conductivity type; a first well having a second conductivity type formed in a first region in a major surface of the semiconductor substrate; a second well having the first conductivity type formed in a second region in the major surface of the semiconductor substrate; a first MOS transistor having the first conductivity type and a first contact region having the second conductivity type formed in the first well; a second MOS transistor having the second conductivity type and a second contact region having the second conductivity type formed in the second well; a heavily doped region of buried layer having the second conductivity type formed at a portion corresponding to the first contact region in the first well; and a heavily doped region of buried layer having the first conductivity type formed at a portion corresponding to the second contact region in the second well.
    Type: Application
    Filed: September 19, 2001
    Publication date: May 30, 2002
    Applicant: Hyundai Electronics Industries Co., Ltd.
    Inventor: Joo-Hyong Lee
  • Publication number: 20020024102
    Abstract: Provided with a method of fabricating a semiconductor device including the steps of: selectively forming an insulating oxide layer in a semiconductor substrate having a first conductivity type, wherein the semiconductor substrate has first and second regions; forming impurity layers having a second conductivity type in the first and second regions of the semiconductor substrate; forming a first mask layer in the second region of the semiconductor substrate; forming impurity layers having the second conductivity type in the first region of the semiconductor substrate by performing serial ion implantations with different doses of dopants at different acceleration energies; forming a second mask layer in the first region of the semiconductor substrate; and forming impurity layers having the first conductivity type in the second region of the semiconductor substrate by performing serial ion implantations with different doses of dopants at different acceleration energies.
    Type: Application
    Filed: October 23, 2001
    Publication date: February 28, 2002
    Applicant: Hyundai Electronics Industries Co., Ltd.
    Inventors: Joo-Hyong Lee, Jeong-Hwan Son
  • Patent number: 6309940
    Abstract: Provided with a semiconductor device including: a semiconductor substrate having a first conductivity type; a first well having a second conductivity type formed in a first region in a major surface of the semiconductor substrate; a second well having the first conductivity type formed in a second region in the major surface of the semiconductor substrate; a first MOS transistor having the first conductivity type and a first contact region having the second conductivity type formed in the first well; a second MOS transistor having the second conductivity type and a second contact region having the second conductivity type formed in the second well; a heavily doped region of buried layer having the second conductivity type formed at a portion corresponding to the first contact region in the first well; and a heavily doped region of buried layer having the first conductivity type formed at a portion corresponding to the second contact region in the second well.
    Type: Grant
    Filed: April 14, 1999
    Date of Patent: October 30, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Joo-Hyong Lee
  • Publication number: 20010014500
    Abstract: The method of fabricating a semiconductor device includes the steps of selectively forming an insulating oxide layer in a semiconductor substrate having a first conductivity type, wherein the semiconductor substrate has first and second regions; forming impurity layers having a second conductivity type in the first and second regions of the semiconductor substrate; forming a first mask layer in the second region of the semiconductor substrate; forming impurity layers having the second conductivity type in the first region of the semiconductor substrate by performing serial ion implantations with different doses of dopants at different acceleration energies; forming a second mask layer in the first region of the semiconductor substrate; and forming impurity layers having the first conductivity type in the second region of the semiconductor substrate by performing serial ion implantations with different doses of dopants at different acceleration energies.
    Type: Application
    Filed: March 20, 2001
    Publication date: August 16, 2001
    Applicant: Hyundai Electronics Industries
    Inventors: Joo-Hyong Lee, Jeong-Hwan Son
  • Patent number: 6063708
    Abstract: A method for forming an isolating layer in a semiconductor device including the steps of sequentially forming a buffer oxide layer, a CVD oxide layer and a first nitride layer on a semiconductor substrate, selectively removing the first nitride layer, selectively exposing a surface of the semiconductor substrate using the first nitride layer as a mask, forming and planarizing a second nitride layer on the selectively exposed surface of the semiconductor substrate, removing the CVD oxide layer and buffer oxide layer using the second nitride layer as a mask, while leaving a nitride pattern layer which becomes wider in an upward direction, forming oxide sidewalls at sides of the nitride pattern layer, forming a trench having a slope by selectively etching the semiconductor substrate using the oxide sidewalls as a mask, depositing a filling insulating material layer on the nitride pattern layer, the oxide sidewalls and in the trench, planarizing the filling insulating material layer until a surface of the nitride
    Type: Grant
    Filed: October 27, 1998
    Date of Patent: May 16, 2000
    Assignee: LG Semicon Co., LTD.
    Inventor: Joo Hyong Lee