Abstract: Disclosed is a motor driving apparatus including: a motor; an inverter including a switching element for driving the motor; a controller for controlling the switching element; a resolver including an excitation winding and a detection winding; and a resolver chip applying an excitation signal to the excitation winding by inputting a periodic signal from the controller, and receiving a feedback signal from the detection winding, wherein the resolver chip determines the number of rotations of the motor based on a change in a pulse width of a detection signal resulting from a comparison between a voltage of the feedback signal and a preset voltage, and output a signal to the inverter for setting an inertial driving control mode according to the number of rotations of the motor in a failure state of the controller.

Abstract: A cylindrical secondary battery and a manufacturing method of a secondary battery are provided. A manufacturing method of a cylindrical secondary battery includes: winding an electrode assembly to expose a first electrode uncoated portion and a second electrode uncoated portion to opposite ends in a longitudinal direction; bending at least some portions of the first electrode uncoated portion and the second electrode uncoated portion of the electrode assembly in a direction by pressing the first electrode uncoated portion and the second electrode uncoated portion; welding electrode collector plates to ends of the bent first and second electrode uncoated portions; and inserting and sealing the electrode assembly into a cylindrical case.

Abstract: Disclosed is an apparatus for excitation signal generation for a resolver. The apparatus includes a sine wave generator that generates a sine wave based on a square wave, an amplifier that amplifies the sine wave, a differential signal generator that converts, into a differential signal, the amplified sine wave, a driver that inputs the differential signal to a coil, and a processor that generates an excitation signal by increasing a voltage of the sine wave from a start voltage to a target voltage through at least one of the sine wave generator and the amplifier based on a transient current that flows into the coil in a transient response interval.

Abstract: The present disclosure provides a method of treating waste plastic pyrolysis oil. The method includes a first step of washing waste plastic pyrolysis oil with water and then removing moisture; a second step of mixing the waste plastic pyrolysis oil from which the moisture is removed and a sulfur source to prepare a mixed oil; a third step of hydrotreating the mixed oil with hydrogen gas in the presence of a hydrotreating catalyst; a fourth step of separating the hydrotreated mixed oil into a liquid stream and a gas stream to obtain liquid pyrolysis oil; and a fifth step of recovering hydrogen gas from the separated gas stream and recycling the recovered hydrogen gas to the third step.

Abstract: The present disclosure provides a method of treating waste plastic pyrolysis oil. The method includes a first step of washing waste plastic pyrolysis oil with water and then removing moisture; a second step of mixing the waste plastic pyrolysis oil from which the moisture is removed and a sulfur source to prepare a mixed oil; a third step of hydrotreating the mixed oil with hydrogen gas in the presence of a hydrotreating catalyst; a fourth step of separating the hydrotreated mixed oil into a liquid stream and a gas stream to obtain liquid pyrolysis oil; and a fifth step of recovering hydrogen gas from the separated gas stream and recycling the recovered hydrogen gas to the third step.

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a stacked structure in which a plurality of insulating layers and a plurality of electrode layers are alternately stacked on the substrate. The semiconductor device includes a plurality of dummy channel structures that pass through the stacked structure. Moreover, the semiconductor device includes a contact structure in contact with at least one of the plurality of dummy channel structures adjacent thereto, and in contact with one of the plurality of electrode layers.

Abstract: A vertical-type memory device includes a plurality of gate electrode layers spaced apart from one another and stacked on a substrate, and extending by different lengths in a first direction and forming a staircase structure, a first interlayer insulating layer covering the staircase structure of the plurality of gate electrode layers, and a plurality of gate contact plugs penetrating the interlayer insulating layer and respectively in contact with the gate electrode layers. The plurality of gate electrode layers include lower gate electrode layers disposed adjacently to the substrate, and upper gate electrode layers disposed on the lower gate electrode layers, so that the lower gate electrodes are between the substrate and the upper gate electrode layers. The plurality of gate contact plugs include lower gate contact plugs connected to the lower gate electrode layers, and upper gate contact plugs connected to the upper gate electrode layers.

Abstract: A method of canceling road noise includes: receiving a first signal from an acceleration sensor disposed at a vehicle and a second signal from a microphone disposed at the vehicle; monitoring, based on the first and second signals, whether an abnormal event has occurred; determining, based on a result from monitoring whether the abnormal event has occurred, a plurality of parameter values for performing adaptive filtering; and performing, based on the determined parameter values, adaptive filtering to generating an output signal for noise canceling.

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a stacked structure in which a plurality of insulating layers and a plurality of electrode layers are alternately stacked on the substrate. The semiconductor device includes a plurality of dummy channel structures that pass through the stacked structure. Moreover, the semiconductor device includes a contact structure in contact with at least one of the plurality of dummy channel structures adjacent thereto, and in contact with one of the plurality of electrode layers.

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a stacked structure in which a plurality of insulating layers and a plurality of electrode layers are alternately stacked on the substrate. The semiconductor device includes a plurality of dummy channel structures that pass through the stacked structure. Moreover, the semiconductor device includes a contact structure in contact with at least one of the plurality of dummy channel structures adjacent thereto, and in contact with one of the plurality of electrode layers.

Abstract: Provided is a method of desalting crude oil capable of effectively removing metal impurities in the crude oil and a rag layer which is formed in a crude oil desalting process.

Abstract: A vertical-type memory device includes a plurality of gate electrode layers spaced apart from one another and stacked on a substrate, and extending by different lengths in a first direction and forming a staircase structure, a first interlayer insulating layer covering the staircase structure of the plurality of gate electrode layers, and a plurality of gate contact plugs penetrating the interlayer insulating layer and respectively in contact with the gate electrode layers. The plurality of gate electrode layers include lower gate electrode layers disposed adjacently to the substrate, and upper gate electrode layers disposed on the lower gate electrode layers, so that the lower gate electrodes are between the substrate and the upper gate electrode layers. The plurality of gate contact plugs include lower gate contact plugs connected to the lower gate electrode layers, and upper gate contact plugs connected to the upper gate electrode layers.

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a stacked structure in which a plurality of insulating layers and a plurality of electrode layers are alternately stacked on the substrate. The semiconductor device includes a plurality of dummy channel structures that pass through the stacked structure. Moreover, the semiconductor device includes a contact structure in contact with at least one of the plurality of dummy channel structures adjacent thereto, and in contact with one of the plurality of electrode layers.

Abstract: A vertical-type memory device includes a plurality of gate electrode layers spaced apart from one another and stacked on a substrate, and extending by different lengths in a first direction and forming a staircase structure, a first interlayer insulating layer covering the staircase structure of the plurality of gate electrode layers, and a plurality of gate contact plugs penetrating the interlayer insulating layer and respectively in contact with the gate electrode layers. The plurality of gate electrode layers include lower gate electrode layers disposed adjacently to the substrate, and upper gate electrode layers disposed on the lower gate electrode layers, so that the lower gate electrodes are between the substrate and the upper gate electrode layers. The plurality of gate contact plugs include lower gate contact plugs connected to the lower gate electrode layers, and upper gate contact plugs connected to the upper gate electrode layers.

Abstract: Provided is a method of desalting crude oil capable of effectively removing metal impurities in the crude oil and a rag layer which is formed in a crude oil desalting process.

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a stacked structure in which a plurality of insulating layers and a plurality of electrode layers are alternately stacked on the substrate. The semiconductor device includes a plurality of dummy channel structures that pass through the stacked structure. Moreover, the semiconductor device includes a contact structure in contact with at least one of the plurality of dummy channel structures adjacent thereto, and in contact with one of the plurality of electrode layers.

Abstract: A vertical-type memory device includes a plurality of gate electrode layers spaced apart from one another and stacked on a substrate, and extending by different lengths in a first direction and forming a staircase structure, a first interlayer insulating layer covering the staircase structure of the plurality of gate electrode layers, and a plurality of gate contact plugs penetrating the interlayer insulating layer and respectively in contact with the gate electrode layers. The plurality of gate electrode layers include lower gate electrode layers disposed adjacently to the substrate, and upper gate electrode layers disposed on the lower gate electrode layers, so that the lower gate electrodes are between the substrate and the upper gate electrode layers. The plurality of gate contact plugs include lower gate contact plugs connected to the lower gate electrode layers, and upper gate contact plugs connected to the upper gate electrode layers.

Abstract: The present invention relates to a method for preparing nanoparticle of active ingredient using lipid as lubricant in milling process, and more specifically, it relates to a method for preparing active ingredient into nanoparticle, which can be properly used in drugs, cosmetics, functional foods, etc., by pulverizing a mixture comprising the active ingredient and a lipid as a lubricant, and a biocompatible polymer having a glass transition temperature of 80° C. or higher by roll mill, and then removing the lipid used as a lubricant therefrom by using supercritical fluid.

Abstract: A power integrated device includes a channel region, a source region, a drift region, and a drain region. A stacked gate includes a gate insulation layer and a gate electrode. The stacked gate having a plurality of stacked gate extension portions that extend from the stacked gate to over the plurality of deep trench field insulation layers. A plurality of deep trench field insulation layers is disposed in the drift region. The deep trench field insulation layers are spaced apart from each other in a channel width direction. A height of the deep trench field insulation layers is greater than a width of the deep trench field insulation layer.

Abstract: A lateral power integrated device includes a source region and a drain region disposed in a semiconductor layer and spaced apart from each other in a first direction, a drift region disposed in the semiconductor layer and surrounding the drain region, a channel region arranged between the source region and the drift region in the first direction, a plurality of planar insulation field plates disposed over the drift region and spaced apart from each other in a second direction, a plurality of trench insulation field plates disposed in the drift region, a gate insulation layer formed over the channel region, and a gate electrode formed over the gate insulation layer. Each of the trench insulation field plates is disposed between the planar insulation field plates in the second direction.