Patents by Inventor Joo-Woo Kim

Joo-Woo Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070252993
    Abstract: In a method of aligning a wafer, which is capable of precisely and rapidly aligning the wafer, and a wafer alignment apparatus using the method of aligning the wafer, a first wafer is aligned to form a first template pattern corresponding to an image of the first wafer. Image data of a second wafer is inputted. A kind of the second wafer is different from that of the first wafer. A second template pattern is formed by transforming the first template pattern in response to the image data of the second wafer. The second wafer is then aligned in response to the second template pattern. Accordingly, the template pattern is formed using the image data to align the wafer although wafers having different images are inspected, thereby rapidly forming the template pattern.
    Type: Application
    Filed: June 25, 2007
    Publication date: November 1, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyu-Hong Lim, Byung-Am Lee, Joo-Woo Kim, Chang-Hoon Lee
  • Patent number: 7289661
    Abstract: An automated and integrated substrate inspecting apparatus for performing an EBR/EEW inspection, a defect inspection of patterns and reticle error inspection of a substrate includes a first stage for supporting a substrate; a first image acquisition unit for acquiring a first image of a peripheral portion of the substrate supported by the first stage; a second stage for supporting the substrate; a second image acquisition unit for acquiring a second image of the substrate supported by the second stage; a transfer robot for transferring the substrate between the first stage and the second stage; and a data processing unit, connected to the first image acquisition unit and the second image acquisition unit, for inspecting results of an edge bead removal process and an edge exposure process performed on the substrate using the first image, and for inspecting for defects of patterns formed on the substrate using the second image.
    Type: Grant
    Filed: September 15, 2003
    Date of Patent: October 30, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chung-Sam Jun, Sun-Yong Choi, Kwang-Soo Kim, Joo-Woo Kim, Jeong-Hyun Choi, Dong-Jin Park
  • Patent number: 7235411
    Abstract: In a method of aligning a wafer, which is capable of precisely and rapidly aligning the wafer, and a wafer alignment apparatus using the method of aligning the wafer, a first wafer is aligned to form a first template pattern corresponding to an image of the first wafer. Image data of a second wafer is inputted. A kind of the second wafer is different from that of the first wafer. A second template pattern is formed by transforming the first template pattern in response to the image data of the second wafer. The second wafer is then aligned in response to the second template pattern. Accordingly, the template pattern is formed using the image data to align the wafer although wafers having different images are inspected, thereby rapidly forming the template pattern.
    Type: Grant
    Filed: July 6, 2004
    Date of Patent: June 26, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyu-Hong Lim, Byung-Am Lee, Joo-Woo Kim, Chang-Hoon Lee
  • Patent number: 7155366
    Abstract: A wafer pattern inspecting apparatus and method are disclosed. The apparatus comprises an image sensor to acquire image data from a reference die and a sample die, an external memory to store the image data, an encoder to compress the data, a decoder to decompress the data, an internal memory device to store the compressed image data of the reference die, an arithmetic module to process the image data for the reference dies to extract a reference image data, a reference storage memory to store compressed reference image data, and a comparison module to compare the sample die image data with the reference image data to an extract defect data for the sample die.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: December 26, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Hoon Lee, Byung-Am Lee, Byung-Seol Ahn, Jae-Sun Cho, Joo-Woo Kim, Sung-Man Lee
  • Publication number: 20050119844
    Abstract: A wafer pattern inspecting apparatus and method are disclosed. The apparatus comprises an image sensor to acquire image data from a reference die and a sample die, an external memory to store the image data, an encoder to compress the data, a decoder to decompress the data, an internal memory device to store the compressed image data of the reference die, an arithmetic module to process the image data for the reference dies to extract a reference image data, a reference storage memory to store compressed reference image data, and a comparison module to compare the sample die image data with the reference image data to an extract defect data for the sample die.
    Type: Application
    Filed: November 30, 2004
    Publication date: June 2, 2005
    Inventors: Chang-Hoon Lee, Byung-Am Lee, Byung-Seol Ahn, Jae-Sun Cho, Joo-Woo Kim, Sung-Man Lee
  • Publication number: 20050009214
    Abstract: In a method of aligning a wafer, which is capable of precisely and rapidly aligning the wafer, and a wafer alignment apparatus using the method of aligning the wafer, a first wafer is aligned to form a first template pattern corresponding to an image of the first wafer. Image data of a second wafer is inputted. A kind of the second wafer is different from that of the first wafer. A second template pattern is formed by transforming the first template pattern in response to the image data of the second wafer. The second wafer is then aligned in response to the second template pattern. Accordingly, the template pattern is formed using the image data to align the wafer although wafers having different images are inspected, thereby rapidly forming the template pattern.
    Type: Application
    Filed: July 6, 2004
    Publication date: January 13, 2005
    Inventors: Kyu-Hong Lim, Byung-Am Lee, Joo-Woo Kim, Chang-Hoon Lee
  • Publication number: 20040086171
    Abstract: An automated and integrated substrate inspecting apparatus for performing an EBR/EEW inspection, a defect inspection of patterns and reticle error inspection of a substrate includes a first stage for supporting a substrate; a first image acquisition unit for acquiring a first image of a peripheral portion of the substrate supported by the first stage; a second stage for supporting the substrate; a second image acquisition unit for acquiring a second image of the substrate supported by the second stage; a transfer robot for transferring the substrate between the first stage and the second stage; and a data processing unit, connected to the first image acquisition unit and the second image acquisition unit, for inspecting results of an edge bead removal process and an edge exposure process performed on the substrate using the first image, and for inspecting for defects of patterns formed on the substrate using the second image.
    Type: Application
    Filed: September 15, 2003
    Publication date: May 6, 2004
    Inventors: Chung-Sam Jun, Sun-Yong Choi, Kwang-Soo Kim, Joo-Woo Kim, Jeong-Hyun Choi, Dong-Jin Park