Patents by Inventor Joo-Woo Kim

Joo-Woo Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170605
    Abstract: A manufacturing apparatus of a display device, includes: a first unit to transfer a plurality of light emitting elements on a growth substrate to a first film; a second unit to expand the first film; a third unit to retransfer the plurality of light emitting elements to a second film; a fourth unit to determine positions of the plurality of light emitting elements on the second film; a fifth unit to bin the light emitting elements on the second film, and determine an effective light source from among the light emitting elements; a sixth unit to form a plurality of pixels on a substrate, each pixel including a first bonding electrode; a seventh unit to remove the second film after transferring one light emitting element to the first bonding electrode of one pixel; and an eighth unit to form a second electrode on the one light emitting element.
    Type: Application
    Filed: January 29, 2024
    Publication date: May 23, 2024
    Inventors: Jin Woo CHOI, Min Woo KIM, Sung Kook PARK, Dae Ho SONG, So Yeon YOON, Joo Woan CHO
  • Publication number: 20240158692
    Abstract: The present inventive concept relates to an in situ core/shell perovskite nanocrystal film formed by an in situ nanocrystal synthesis process, a method for producing the same, and a light emitting device comprising the same as a light-emitting layer. The in situ core/shell perovskite nanocrystal film formed by the in situ nanocrystal synthesis process according to the present inventive concept exhibits a strong charge confinement effect by nanocrystal formation, and can simultaneously greatly improve the luminescence efficiency and lifetime by maintaining the fast charge transport capability of polycrystalline perovskite.
    Type: Application
    Filed: October 11, 2023
    Publication date: May 16, 2024
    Inventors: Tae-Woo LEE, Joo Sung KIM
  • Patent number: 11969397
    Abstract: The present invention relates to a composition for preventing or treating transplantation rejection or a transplantation rejection disease, comprising a novel compound and a calcineurin inhibitor. A co-administration of the present invention 1) reduces the activity of pathogenic Th1 cells or Th17 cells, 2) increases the activity of Treg cells, 3) has an inhibitory effect against side effects, such as tissue damage, occurring in the sole administration thereof, 4) inhibits various pathogenic pathways, 5) inhibits the cell death of inflammatory cells, and 6) increases the activity of mitochondria, in an in vivo or in vitro allogenic model, a transplantation rejection disease model, a skin transplantation model, and a liver-transplanted patient, and thus inhibits transplantation rejection along with mitigating side effects possibly occurring in the administration of a conventional immunosuppressant alone.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: April 30, 2024
    Assignee: THE CATHOLIC UNIVERSITY OF KOREA INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Mi-La Cho, Dong-Yun Shin, Jong-Young Choi, Chul-Woo Yang, Sung-Hwan Park, Seon-Yeong Lee, Min-Jung Park, Joo-Yeon Jhun, Se-Young Kim, Hyeon-Beom Seo, Jae-Yoon Ryu, Keun-Hyung Cho
  • Patent number: 11961432
    Abstract: A display device includes a display area and a non-display area disposed around the display area and including a pad area. The display device includes a resistance checker disposed in the non-display area, resistance test pads disposed in the pad area, resistance test lines connecting the resistance checker with the resistance test pad, and crack test lines disposed on the outer side of the resistance checker. The resistance test lines intersect the crack test lines in a plan view.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: April 16, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Joo Hye Jung, Keon Woo Kim, Dong Hyun Lee, Deuk Jong Kim, Deok Young Choi
  • Patent number: 11940814
    Abstract: Disclosed herein are a cooperative driving method based on driving negotiation and an apparatus for the same. The cooperative driving method is performed by a cooperative driving apparatus for cooperative driving based on driving negotiation, and includes determining whether cooperative driving is possible in consideration of a driving mission of a requesting vehicle that requests cooperative driving with neighboring vehicles, when it is determined that cooperative driving is possible, setting a responding vehicle from which cooperative driving is to be requested among the neighboring vehicles, performing driving negotiation between the requesting vehicle and the responding vehicle based on a driving negotiation protocol, and when the driving negotiation is completed, performing cooperative driving by providing driving guidance information for vehicle control to at least one of the requesting vehicle and the responding vehicle.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: March 26, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yoo-Seung Song, Joo-Young Kim, Kyoung-Wook Min, Yong-Woo Jo, Jeong-Dan Choi
  • Patent number: 11934930
    Abstract: An inference system applies a machine-learning transformer model to a batch of requests with variable input length or variable target length or variable internal state length by selectively batching a subset of operations in the transformer model but processing requests in the batch individually for a subset of operations in the transformer model. In one embodiment, the operation to be processed individually is an attention operation of an encoder or a decoder of the transformer model. By selective batching, the inference system can allow batching operations to be performed for a batch of requests with variable input or target length or internal state length to utilize the parallel computation capabilities of hardware accelerators while preventing unnecessary computations that occur for workarounds that restrain the data of a batch of requests to a same length.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: March 19, 2024
    Assignee: FRIENDLIAI INC.
    Inventors: Gyeongin Yu, Geon-Woo Kim, Joo Seong Jeong, Soojeong Kim, Byung-Gon Chun
  • Patent number: 11922282
    Abstract: An inference system applies a machine-learning transformer model to a batch of requests with variable input length or variable target length or variable internal sate length by selectively batching a subset of operations in the transformer model but processing requests in the batch individually for a subset of operations in the transformer model. In one embodiment, the operation to be processed individually is an attention operation of an encoder or a decoder of the transformer model. By selective batching, the inference system can allow batching operations to be performed for a batch of requests with variable input or target length or internal state length to utilize the parallel computation capabilities of hardware accelerators while preventing unnecessary computations that occur for workarounds that restrain the data of a batch of requests to a same length.
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: March 5, 2024
    Assignee: FRIENDLIAI INC.
    Inventors: Gyeongin Yu, Geon-Woo Kim, Joo Seong Jeong, Soojeong Kim, Byung-Gon Chun
  • Publication number: 20070252993
    Abstract: In a method of aligning a wafer, which is capable of precisely and rapidly aligning the wafer, and a wafer alignment apparatus using the method of aligning the wafer, a first wafer is aligned to form a first template pattern corresponding to an image of the first wafer. Image data of a second wafer is inputted. A kind of the second wafer is different from that of the first wafer. A second template pattern is formed by transforming the first template pattern in response to the image data of the second wafer. The second wafer is then aligned in response to the second template pattern. Accordingly, the template pattern is formed using the image data to align the wafer although wafers having different images are inspected, thereby rapidly forming the template pattern.
    Type: Application
    Filed: June 25, 2007
    Publication date: November 1, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyu-Hong Lim, Byung-Am Lee, Joo-Woo Kim, Chang-Hoon Lee
  • Patent number: 7289661
    Abstract: An automated and integrated substrate inspecting apparatus for performing an EBR/EEW inspection, a defect inspection of patterns and reticle error inspection of a substrate includes a first stage for supporting a substrate; a first image acquisition unit for acquiring a first image of a peripheral portion of the substrate supported by the first stage; a second stage for supporting the substrate; a second image acquisition unit for acquiring a second image of the substrate supported by the second stage; a transfer robot for transferring the substrate between the first stage and the second stage; and a data processing unit, connected to the first image acquisition unit and the second image acquisition unit, for inspecting results of an edge bead removal process and an edge exposure process performed on the substrate using the first image, and for inspecting for defects of patterns formed on the substrate using the second image.
    Type: Grant
    Filed: September 15, 2003
    Date of Patent: October 30, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chung-Sam Jun, Sun-Yong Choi, Kwang-Soo Kim, Joo-Woo Kim, Jeong-Hyun Choi, Dong-Jin Park
  • Patent number: 7235411
    Abstract: In a method of aligning a wafer, which is capable of precisely and rapidly aligning the wafer, and a wafer alignment apparatus using the method of aligning the wafer, a first wafer is aligned to form a first template pattern corresponding to an image of the first wafer. Image data of a second wafer is inputted. A kind of the second wafer is different from that of the first wafer. A second template pattern is formed by transforming the first template pattern in response to the image data of the second wafer. The second wafer is then aligned in response to the second template pattern. Accordingly, the template pattern is formed using the image data to align the wafer although wafers having different images are inspected, thereby rapidly forming the template pattern.
    Type: Grant
    Filed: July 6, 2004
    Date of Patent: June 26, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyu-Hong Lim, Byung-Am Lee, Joo-Woo Kim, Chang-Hoon Lee
  • Patent number: 7155366
    Abstract: A wafer pattern inspecting apparatus and method are disclosed. The apparatus comprises an image sensor to acquire image data from a reference die and a sample die, an external memory to store the image data, an encoder to compress the data, a decoder to decompress the data, an internal memory device to store the compressed image data of the reference die, an arithmetic module to process the image data for the reference dies to extract a reference image data, a reference storage memory to store compressed reference image data, and a comparison module to compare the sample die image data with the reference image data to an extract defect data for the sample die.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: December 26, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Hoon Lee, Byung-Am Lee, Byung-Seol Ahn, Jae-Sun Cho, Joo-Woo Kim, Sung-Man Lee
  • Publication number: 20050119844
    Abstract: A wafer pattern inspecting apparatus and method are disclosed. The apparatus comprises an image sensor to acquire image data from a reference die and a sample die, an external memory to store the image data, an encoder to compress the data, a decoder to decompress the data, an internal memory device to store the compressed image data of the reference die, an arithmetic module to process the image data for the reference dies to extract a reference image data, a reference storage memory to store compressed reference image data, and a comparison module to compare the sample die image data with the reference image data to an extract defect data for the sample die.
    Type: Application
    Filed: November 30, 2004
    Publication date: June 2, 2005
    Inventors: Chang-Hoon Lee, Byung-Am Lee, Byung-Seol Ahn, Jae-Sun Cho, Joo-Woo Kim, Sung-Man Lee
  • Publication number: 20050009214
    Abstract: In a method of aligning a wafer, which is capable of precisely and rapidly aligning the wafer, and a wafer alignment apparatus using the method of aligning the wafer, a first wafer is aligned to form a first template pattern corresponding to an image of the first wafer. Image data of a second wafer is inputted. A kind of the second wafer is different from that of the first wafer. A second template pattern is formed by transforming the first template pattern in response to the image data of the second wafer. The second wafer is then aligned in response to the second template pattern. Accordingly, the template pattern is formed using the image data to align the wafer although wafers having different images are inspected, thereby rapidly forming the template pattern.
    Type: Application
    Filed: July 6, 2004
    Publication date: January 13, 2005
    Inventors: Kyu-Hong Lim, Byung-Am Lee, Joo-Woo Kim, Chang-Hoon Lee
  • Publication number: 20040086171
    Abstract: An automated and integrated substrate inspecting apparatus for performing an EBR/EEW inspection, a defect inspection of patterns and reticle error inspection of a substrate includes a first stage for supporting a substrate; a first image acquisition unit for acquiring a first image of a peripheral portion of the substrate supported by the first stage; a second stage for supporting the substrate; a second image acquisition unit for acquiring a second image of the substrate supported by the second stage; a transfer robot for transferring the substrate between the first stage and the second stage; and a data processing unit, connected to the first image acquisition unit and the second image acquisition unit, for inspecting results of an edge bead removal process and an edge exposure process performed on the substrate using the first image, and for inspecting for defects of patterns formed on the substrate using the second image.
    Type: Application
    Filed: September 15, 2003
    Publication date: May 6, 2004
    Inventors: Chung-Sam Jun, Sun-Yong Choi, Kwang-Soo Kim, Joo-Woo Kim, Jeong-Hyun Choi, Dong-Jin Park