Patents by Inventor Joo Young MOON
Joo Young MOON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240123019Abstract: The present invention relates to a composition for treating or ameliorating a liver disease and liver dysfunction, which includes a Zizania latifolia extract and a pharmaceutical composition or a food composition. The Zizania latifolia extract according to the present invention contains a high content of tricin, and thus may have an improved treatment, alleviation, amelioration, or prevention effect on liver diseases and liver dysfunction compared to those of conventional extraction methods.Type: ApplicationFiled: December 26, 2023Publication date: April 18, 2024Applicant: BTC CORPORATIONInventors: Tae Young KIM, Joo Myung MOON
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Publication number: 20240108675Abstract: The present disclosure relates to a composition for antiobesity, which contains a Gynostemma pentaphyllum tea or a Gynostemma pentaphyllum tea extract as an active ingredient. The composition of the present disclosure, which contains a Gynostemma pentaphyllum tea or a Gynostemma pentaphyllum tea extract as an active ingredient, is effective for preventing, alleviating or treating diabetes, obesity, muscle loss, etc. since it exhibits the efficacy of increasing AMPK activity, promoting beta oxidation, promoting glucose uptake, etc. In addition, since the composition of the present disclosure is derived from a natural product, it can be safely used as a drug, food, etc. without side effects.Type: ApplicationFiled: November 27, 2023Publication date: April 4, 2024Applicant: BIONIC TRADING CORPORATIONInventors: Joo Myung MOON, Hyung Joong KIM, Jung Eun GWAG, Seung Beom YUN, Tae Young KIM
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Patent number: 11922543Abstract: A method, performed by a coloring apparatus, of coloring a sketch image includes adding a color pointer on the sketch image, according to an input of a user; determining an object related to a point where the color pointer is located, from among objects configuring the sketch image; and generating a colored image by coloring the determined object, based on a color of the color pointer.Type: GrantFiled: January 18, 2022Date of Patent: March 5, 2024Assignee: NAVER WEBTOON LTD.Inventors: Jun Hyun Park, Yu Ra Shin, Du Yong Lee, Joo Young Moon
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Publication number: 20220139000Abstract: A method, performed by a coloring apparatus, of coloring a sketch image includes adding a color pointer on the sketch image, according to an input of a user; determining an object related to a point where the color pointer is located, from among objects configuring the sketch image; and generating a colored image by coloring the determined object, based on a color of the color pointer.Type: ApplicationFiled: January 18, 2022Publication date: May 5, 2022Inventors: Jun Hyun PARK, Yu Ra SHIN, Du Yong LEE, Joo Young MOON
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Patent number: 11183635Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a first sacrificial film over a target layer to be etched, forming a first partition mask over the first sacrificial film, forming a first sacrificial film pattern by etching the first sacrificial film using the first partition mask, forming a first spacer at a sidewall of the first sacrificial film pattern, and forming a first spacer pattern by removing the first sacrificial film pattern. The first partition mask includes a plurality of first line-shaped space patterns extending in a first direction. A width of at least one space pattern located at both edges from among the plurality of first space patterns is smaller than a width of each of other space patterns.Type: GrantFiled: September 2, 2020Date of Patent: November 23, 2021Assignee: SK Hynix Inc.Inventors: Joo Young Moon, Young Seok Ko, Soo Gil Kim
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Publication number: 20200403155Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a first sacrificial film over a target layer to be etched, forming a first partition mask over the first sacrificial film, forming a first sacrificial film pattern by etching the first sacrificial film using the first partition mask, forming a first spacer at a sidewall of the first sacrificial film pattern, and forming a first spacer pattern by removing the first sacrificial film pattern. The first partition mask includes a plurality of first line-shaped space patterns extending in a first direction. A width of at least one space pattern located at both edges from among the plurality of first space patterns is smaller than a width of each of other space patterns.Type: ApplicationFiled: September 2, 2020Publication date: December 24, 2020Inventors: Joo Young MOON, Young Seok KO, Soo Gil KIM
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Patent number: 10797239Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a first sacrificial film over a target layer to be etched, forming a first partition mask over the first sacrificial film, forming a first sacrificial film pattern by etching the first sacrificial film using the first partition mask, forming a first spacer at a sidewall of the first sacrificial film pattern, and forming a first spacer pattern by removing the first sacrificial film pattern. The first partition mask includes a plurality of first line-shaped space patterns extending in a first direction. A width of at least one space pattern located at both edges from among the plurality of first space patterns is smaller than a width of each of other space patterns.Type: GrantFiled: May 15, 2019Date of Patent: October 6, 2020Assignee: SK hynix Inc.Inventors: Joo Young Moon, Young Seok Ko, Soo Gil Kim
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Publication number: 20200144500Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a first sacrificial film over a target layer to be etched, forming a first partition mask over the first sacrificial film, forming a first sacrificial film pattern by etching the first sacrificial film using the first partition mask, forming a first spacer at a sidewall of the first sacrificial film pattern, and forming a first spacer pattern by removing the first sacrificial film pattern. The first partition mask includes a plurality of first line-shaped space patterns extending in a first direction. A width of at least one space pattern located at both edges from among the plurality of first space patterns is smaller than a width of each of other space patterns.Type: ApplicationFiled: May 15, 2019Publication date: May 7, 2020Inventors: Joo Young MOON, Young Seok KO, Soo Gil KIM
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Patent number: 10380045Abstract: This technology provides an electronic device and a method for fabricating the same. An electronic device in accordance with an implementation of this document may include a semiconductor memory, wherein the semiconductor memory may include: one or more variable resistance elements each exhibiting different resistance states for storing data, wherein each variable resistance element may include: a Magnetic Tunnel Junction (MTJ) structure including a free layer having a changeable magnetization direction, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer; a seed layer disposed under the MTJ structure to facilitate a growth of the pinned layer or the free layer; and an amorphous metallic carbon layer disposed under the seed layer.Type: GrantFiled: December 28, 2018Date of Patent: August 13, 2019Assignee: SK hynix Inc.Inventor: Joo-Young Moon
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Publication number: 20190138467Abstract: This technology provides an electronic device and a method for fabricating the same. An electronic device in accordance with an implementation of this document may include a semiconductor memory, wherein the semiconductor memory may include: one or more variable resistance elements each exhibiting different resistance states for storing data, wherein each variable resistance element may include: a Magnetic Tunnel Junction (MTJ) structure including a free layer having a changeable magnetization direction, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer; a seed layer disposed under the MTJ structure to facilitate a growth of the pinned layer or the free layer; and an amorphous metallic carbon layer disposed under the seed layer.Type: ApplicationFiled: December 28, 2018Publication date: May 9, 2019Inventor: Joo-Young Moon
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Patent number: 10283709Abstract: In an embodiment, a substrate that includes a cell region and a dummy region is provided. Lower interconnection structures are formed in the cell region and the dummy region. One or more first multilayered structure patterns are formed in the cell region and one or more second multilayered structure patterns in the dummy region over the lower interconnection structures. The first multilayered structure patterns and second multilayered structure patterns extend in a first direction. Each of the second multilayered structure patterns includes an etch target layer. An insulating material layer is formed over the first multilayered structure patterns and the second multilayered structure patterns. An interlayer insulating layer that fills a space between two adjacent patterns of the first multilayered structure patterns and second multilayered structure patterns is formed by planarizing the insulating material layer. The etch target layer in each of the second multilayered structure patterns is removed.Type: GrantFiled: November 28, 2017Date of Patent: May 7, 2019Assignee: SK HYNIX INC.Inventors: Young Seok Ko, Soo Gil Kim, Joo Young Moon
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Patent number: 10199272Abstract: A semiconductor device may include: a plurality of first contacts arranged at a predetermined distance in a first direction and a second direction crossing the first direction; a plurality of second contacts alternately arranged between the first contacts and arranged at a predetermined distance in the first direction and the second direction; a plurality of dog bone-type conductive lines connected to the second contacts arranged in the second direction, respectively, among the plurality of second contacts, and having concave parts and convex parts; and a plurality of etching prevention patterns formed over the plurality of conductive lines so as to overlap the conductive lines, respectively.Type: GrantFiled: March 29, 2018Date of Patent: February 5, 2019Assignee: SK hynix Inc.Inventor: Joo-Young Moon
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Patent number: 10198372Abstract: This technology provides an electronic device and a method for fabricating the same. An electronic device in accordance with an implementation of this document may include a semiconductor memory, wherein the semiconductor memory may include: one or more variable resistance elements each exhibiting different resistance states for storing data, wherein each variable resistance element may include: a Magnetic Tunnel Junction (MTJ) structure including a free layer having a changeable magnetization direction, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer; a seed layer disposed under the MTJ structure to facilitate a growth of the pinned layer or the free layer; and an amorphous metallic carbon layer disposed under the seed layer.Type: GrantFiled: April 6, 2017Date of Patent: February 5, 2019Assignee: SK hynix Inc.Inventor: Joo-Young Moon
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Publication number: 20180315922Abstract: In an embodiment, a substrate that includes a cell region and a dummy region is provided. Lower interconnection structures are formed in the cell region and the dummy region. One or more first multilayered structure patterns are formed in the cell region and one or more second multilayered structure patterns in the dummy region over the lower interconnection structures. The first multilayered structure patterns and second multilayered structure patterns extend in a first direction. Each of the second multilayered structure patterns includes an etch target layer. An insulating material layer is formed over the first multilayered structure patterns and the second multilayered structure patterns. An interlayer insulating layer that fills a space between two adjacent patterns of the first multilayered structure patterns and second multilayered structure patterns is formed by planarizing the insulating material layer. The etch target layer in each of the second multilayered structure patterns is removed.Type: ApplicationFiled: November 28, 2017Publication date: November 1, 2018Inventors: Young Seok KO, Soo Gil KIM, Joo Young MOON
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Publication number: 20180218945Abstract: A semiconductor device may include: a plurality of first contacts arranged at a predetermined distance in a first direction and a second direction crossing the first direction; a plurality of second contacts alternately arranged between the first contacts and arranged at a predetermined distance in the first direction and the second direction; a plurality of dog bone-type conductive lines connected to the second contacts arranged in the second direction, respectively, among the plurality of second contacts, and having concave parts and convex parts; and a plurality of etching prevention patterns formed over the plurality of conductive lines so as to overlap the conductive lines, respectively.Type: ApplicationFiled: March 29, 2018Publication date: August 2, 2018Inventor: Joo-Young Moon
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Patent number: 9935007Abstract: A semiconductor device may include: a plurality of first contacts arranged at a predetermined distance in a first direction and a second direction crossing the first direction; a plurality of second contacts alternately arranged between the first contacts and arranged at a predetermined distance in the first direction and the second direction; a plurality of dog bone-type conductive lines connected to the second contacts arranged in the second direction, respectively, among the plurality of second contacts, and having concave parts and convex parts; and a plurality of etching prevention patterns formed over the plurality of conductive lines so as to overlap the conductive lines, respectively.Type: GrantFiled: August 15, 2016Date of Patent: April 3, 2018Assignee: SK hynix Inc.Inventor: Joo-Young Moon
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Publication number: 20180040809Abstract: This technology provides an electronic device and a method for fabricating the same. An electronic device in accordance with an implementation of this document may include a semiconductor memory, wherein the semiconductor memory may include: one or more variable resistance elements each exhibiting different resistance states for storing data, wherein each variable resistance element may include: a Magnetic Tunnel Junction (MTJ) structure including a free layer having a changeable magnetization direction, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer; a seed layer disposed under the MTJ structure to facilitate a growth of the pinned layer or the free layer; and an amorphous metallic carbon layer disposed under the seed layer.Type: ApplicationFiled: April 6, 2017Publication date: February 8, 2018Inventor: Joo-Young Moon
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Patent number: 9806652Abstract: In some embodiments, a system of controlling an induction electric motor, includes a command voltage output unit for generating a command voltage for operating an inverter according to a command speed and outputting the generated command voltage to the inverter; a control unit for controlling the command voltage output unit such that the command voltage output to the inverter is compared with an operation limiting voltage and the command voltage is corrected to fall within the operation limiting voltage; and the inverter for controlling the induction electric motor depending on the corrected command voltage. Thus, it is possible to precisely control the induction electric motor even in a high speed operation region by regulating the magnitude of the command voltage applied to the induction electric motor by means of dynamic modulation strategies without the magnetic flux controller.Type: GrantFiled: May 25, 2016Date of Patent: October 31, 2017Assignee: LSIS CO., LTD.Inventors: Joo-Young Moon, Hak-Jun Lee, Anno Yoo
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Publication number: 20170154817Abstract: A semiconductor device may include: a plurality of first contacts arranged at a predetermined distance in a first direction and a second direction crossing the first direction; a plurality of second contacts alternately arranged between the first contacts and arranged at a predetermined distance in the first direction and the second direction; a plurality of dog bone-type conductive lines connected to the second contacts arranged in the second direction, respectively, among the plurality of second contacts, and having concave parts and convex parts; and a plurality of etching prevention patterns formed over the plurality of conductive lines so as to overlap the conductive lines, respectively.Type: ApplicationFiled: August 15, 2016Publication date: June 1, 2017Inventor: Joo-Young Moon
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Publication number: 20160352274Abstract: In some embodiments, a system of controlling an induction electric motor, includes a command voltage output unit for generating a command voltage for operating an inverter according to a command speed and outputting the generated command voltage to the inverter; a control unit for controlling the command voltage output unit such that the command voltage output to the inverter is compared with an operation limiting voltage and the command voltage is corrected to fall within the operation limiting voltage; and the inverter for controlling the induction electric motor depending on the corrected command voltage. Thus, it is possible to precisely control the induction electric motor even in a high speed operation region by regulating the magnitude of the command voltage applied to the induction electric motor by means of dynamic modulation strategies without the magnetic flux controller.Type: ApplicationFiled: May 25, 2016Publication date: December 1, 2016Inventors: Joo-Young Moon, Hak-Jun Lee, Anno Yoo