Patents by Inventor Joo-hyun Jin

Joo-hyun Jin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6232225
    Abstract: A method of fabricating a contact window of a semiconductor device, whereby a contact window of a semiconductor device is increased to offset any incline phenomenom and avoid unwanted increase in contact sheet resistance, comprises forming a lower conductive member on a semiconductor substrate, forming a first insulative film on the lower conductive member, the first insulative film being formed of an insulative material doped with impurities at a first level of concentration, the first insulative film having a wet etch rate that is proportional to the level of concentration of impurities, forming a second insulative film on the first insulative film, the second insulative film being formed of an insulative material doped with impurities at a second level of concentration that is lower than the first level of concentration of impurities, the second insulative film also having a wet etch rate that is proportional to the level of concentration of impurities, opening a contact window and exposing the lower condu
    Type: Grant
    Filed: March 24, 1999
    Date of Patent: May 15, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chil-kun Pong, Joo-hyun Jin
  • Patent number: 5940716
    Abstract: Methods of forming trench isolation regions include the steps of forming trenches in a semiconductor substrate using an etching mask having openings therein, and then patterning the mask to enlarge the openings. The trenches and the enlarged openings are then filled with an electrically insulating material and then the insulating material is planarized using a polishing technique (e.g., CMP) and/or a chemical etching technique, to define the final trench isolation regions. Here, at least a portion of the etching mask is also used as a planarization stop. Using these methods, trench isolation regions can be formed having reduced susceptibility to edge defects because the periphery of the trench at the face of the substrate is covered by the electrically insulating material.
    Type: Grant
    Filed: March 14, 1997
    Date of Patent: August 17, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-hyun Jin, Yun-seung Shin