Abstract: A memory system includes a flash memory including a block having first sub-blocks and second sub-blocks different from each other, the second sub-blocks including free pages only; and a controller configured to erase the flash memory in units of the sub-blocks, and in a garbage collection operation, the controller is configured to copy data of a valid page of the first sub-blocks to at least one of the second sub-blocks.

Abstract: A fastening apparatus for a battery terminal case includes a main body having open upper and side portions configured to hold a battery terminal therein, a side body coupled to the open side portion of the main body, and an upper cover, hingedly coupled to the side body, provided at the open upper portion of the main body. Hinge protrusions are formed on opposing sides of one of the side body and the upper cover. Hinge holes are formed on opposing sides of the other one of the side body and the upper cover. The hinge holes are configured to receive the hinge protrusions therein.

Abstract: The present invention relates to an apparatus for atomizing molten slag and recovering valuable metals, and more particularly to an apparatus for atomizing molten slag and recovering valuable metals, which enables molten slag of a blast furnace or a converter or an electric furnace to be atomized and valuable metals to be recovered.

Abstract: A method of providing special functions includes receiving from a host a first normal command and a first address, and identifying a first special function based on the first normal command and the first address when the first address is in an address range established for special functions according to a predefined rule.

Abstract: Provided is a method of updating firmware of a memory device including a memory and a controller driving firmware to control the memory. The method includes updating the firmware of the memory device by transmitting at least one normal command and an address corresponding to the at least one normal command to the memory device. The normal command is a command to issue a normal operation, and the normal operation is not an update operation of the firmware.

Abstract: A memory device and a method of enabling performance of special operations by an application specific to the memory device are provided. The method includes performing at least one of a first authentication operation and a second authentication operation of the memory device using at least one normal command received from the application according to at least one predefined rule, respectively, the first and second authentication operations indicating whether the memory device includes a plurality of special operations; and receiving from the application a first normal command with a starting logical sector number of a dummy file and a second normal command with a last logical sector number of the dummy file, enabling determination of whether the at least one of the first authentication operation and the second authentication operation of the memory device is successful.

Abstract: A memory system includes nonvolatile memory devices (NVM) connected to a controller via a channel and provided with data according to an interleaving approach. A controller respectively accesses the NVM and determines a number of program operations that may be simultaneously executed by the NVM in conjunction with an additional operation upon comparing a peak operating current associated with a sum of respective peak operating currents for the number of program operations and the at least one additional operation with a reference peak current.

Abstract: An image capture device includes an image sensor having an array of pixels therein, which are configured to receive light reflected from an object during an image capture time interval. A light source is provided, which is configured to project light to the object during at least a portion of the image capture time interval. A control circuit/unit is provided, which is electrically coupled to the image sensor and the light source. This control circuit is configured to drive the light source with signals that cause the light source to project light to the object without interruption during at least a first time interval when all rows of a frame of pixels within the array are being sequentially read and during a second time interval when all rows of the frame of pixels within the array are being sequentially read.

Abstract: The present disclosure relates to an airburst simulation system and method. The airburst simulation system includes a laser emitting unit to emit laser beam to an airburst aiming position, preset above a target hidden behind an obstacle, such that a warhead is airbursted to shoot the target, a laser detecting unit mounted onto the target to detect an arrival of the laser beam above the target, and a determining unit to measure a distance between the airburst aiming position and an arrival position of the laser detected by the laser detecting unit, and determine whether or not the target has been shot based on the distance. This allows for a simulated engagement using an airburst apparatus, with no harm to human bodies by virtue of the use of laser.

Abstract: An apparatus for recovering valuable elements is provided herein. In some embodiments, the apparatus having a conveyor; a container configured to be moved on the conveyor, wherein the container has an open surface; a paper package which contains a mixture containing valuable elements, the paper package being configured to be disposed in the container and to be combusted; a cover that covers the open surface of the container, the cover having an opening for discharging valuable elements vaporized from the mixture; a microwave oven through which the container having the cover and the paper package passes, wherein the microwave oven having a microwave generator and a discharging opening for discharging the valuable elements vaporized from the mixture; and a condenser coupled to the discharge opening, wherein the condenser recovers the valuable elements vaporized from the mixture.

Abstract: A structure of an engine room includes an FEM (front end module) disposed at a front side, a dash panel disposed at a rear side, and housing panels disposed at both lateral sides between the FEM and the dash panel, respectively. The structure may include a housing member including a transverse portion which is disposed to be substantially parallel to the dash panel, and longitudinal portions which are bent forward from both ends of the horizontal portion, respectively, and disposed side-by-side with the corresponding housing panels. The housing member is formed with an open interior.

Abstract: Disclosed is a method of detecting a bonding failure of a wire bonder, which comprises a bonding tool operative to form an electrical connection between a semiconductor die and a substrate using a bonding wire. The method comprises the steps of: forming a first wire bond on a first surface located on the semiconductor die using the bonding tool and the bonding wire; forming a second wire bond on a second surface located on the substrate using the bonding tool and the bonding wire such that a wire loop connects the first and second wire bonds, wherein the first surface is not electrically-conductive; moving the bonding tool in a direction away from the second wire bond to break the bonding wire from the second wire bond; detecting whether the second wire bond remains bonded to the substrate; and determining an occurrence of the bonding failure if the second wire bond is no longer bonded to the substrate.

Abstract: Provided are an IC chip and a method of verifying data thereof. The present invention verifies integrity of data by comparing an integrity verifying value generated from data using an integrity verifying value generating algorithm before a write operation for storing data in a storing unit is performed and an integrity verifying value generated from data stored in the storing unit using the integrity verifying value generating algorithm after the write operation is completed. According to the present invention, the present invention can confirm whether data stored in the IC chip is normally stored when manufacturing/issuing the IC chip and whether data stored in the IC chip is normally stored during the IC chip is used.

Abstract: A memory system, comprising a flash memory comprising multiple memory blocks, and a controller configured to erase each of the memory blocks using multiple steps. The controller stores, for each of the memory blocks, metadata indicating which of the multiple steps have been completed, and erases each of the memory blocks based on the stored metadata.

Abstract: A memory system includes a flash memory including a block having first sub-blocks and second sub-blocks different from each other, the second sub-blocks including free pages only; and a controller configured to erase the flash memory in units of the sub-blocks, and in a garbage collection operation, the controller is configured to copy data of a valid page of the first sub-blocks to at least one of the second sub-blocks.

Abstract: A circuit device for power compensation in an integrated controller configured by integrating two or more different electronic control modules, which enable any one of the electronic control modules to receive power supplied from another electronic control module even though an abnormal operation occurs in the electronic control module. That is, the circuit device provides for power compensation in an integrated controller configured by integrating two or more different electronic control modules respectively having independent power circuits, which enable any one of the electronic control modules to immediately receive power supplied from another electronic control module even though an abnormal operation occurs in the electronic control module, thereby easily preventing the abnormal operation of the integrated controller.

Abstract: In a memory system including a flash memory and a memory controller having a cache memory and a nonvolatile random access memory (NVRAM), a method of operating the memory system includes; receiving a write request specifying a write operation directed to a page of a designated active write block in the flash memory, storing a page mapping table for the active write block in the cache memory, generating update information for the page mapping table stored in the cache memory as a result of executing the write operation, and storing the update information in the NVRAM, and storing an updated version of the page mapping table in the flash memory after execution of the write operation is complete.

Abstract: Disclosed is a method of detecting a bonding failure of a wire bonder, which comprises a bonding tool operative to form an electrical connection between a semiconductor die and a substrate using a bonding wire. The method comprises the steps of: forming a first wire bond on a first surface located on the semiconductor die using the bonding tool and the bonding wire; forming a second wire bond on a second surface located on the substrate using the bonding tool and the bonding wire such that a wire loop connects the first and second wire bonds, wherein the first surface is not electrically-conductive; moving the bonding tool in a direction away from the second wire bond to break the bonding wire from the second wire bond; detecting whether the second wire bond remains bonded to the substrate; and determining an occurrence of the bonding failure if the second wire bond is no longer bonded to the substrate.

Abstract: An image capture device includes an image sensor having an array of pixels therein, which are configured to receive light reflected from an object during an image capture time interval. A light source is provided, which is configured to project light to the object during at least a portion of the image capture time interval. A control circuit/unit is provided, which is electrically coupled to the image sensor and the light source. This control circuit is configured to drive the light source with signals that cause the light source to project light to the object without interruption during at least a first time interval when all rows of a frame of pixels within the array are being sequentially read and during a second time interval when all rows of the frame of pixels within the array are being sequentially read.