Patents by Inventor Joon-Hong Park
Joon-Hong Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230108088Abstract: A secondary battery includes: an electrode assembly including a first electrode substrate tab and a second electrode substrate tab; a case accommodating the electrode assembly; strip terminals electrically connected to the first electrode substrate tab and the second electrode substrate tab, respectively, and extending to an outside of the case; and conductive adhesive members around connection portions between the first electrode substrate tab and a strip terminal of the strip terminals and the second electrode substrate tab and another strip terminal of the strip terminals, respectively.Type: ApplicationFiled: September 12, 2022Publication date: April 6, 2023Inventors: Hee Myeong SON, Joon Hong PARK, Jin Hwan KIM, Kwang Soo SEO
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Publication number: 20230084901Abstract: A substrate processing system for selectively etching a layer on a substrate includes an upper chamber region, an inductive coil arranged around the upper chamber region and a lower chamber region including a substrate support to support a substrate. A gas distribution device is arranged between the upper chamber region and the lower chamber region and includes a plate with a plurality of holes. A cooling plenum cools the gas distribution device and a purge gas plenum directs purge gas into the lower chamber. A surface to volume ratio of the holes is greater than or equal to 4. A controller selectively supplies an etch gas mixture to the upper chamber and a purge gas to the purge gas plenum and strikes plasma in the upper chamber to selectively etch a layer of the substrate relative to at least one other exposed layer of the substrate.Type: ApplicationFiled: September 20, 2022Publication date: March 16, 2023Inventors: Kwame EASON, Dengliang Yang, Pilyeon Park, Faisal Yaqoob, Joon Hong Park, Mark Kawaguchi, Ji Zhu, Ivelin Angelov, Hsiao-Eei Chang
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Patent number: 11531584Abstract: A memory device includes a first comparison circuit suitable for comparing read data read from a plurality of memory cells with write data written in the memory cells and outputting a comparison result, a path selection circuit suitable for transferring selected data selected among the read data and test data as read path data based on the comparison result of the first comparison circuit, and an output data alignment circuit suitable for converting the read path data into serial data to output the serial data as output data.Type: GrantFiled: December 30, 2020Date of Patent: December 20, 2022Assignee: SK hynix Inc.Inventors: Seong Ju Lee, Joon Hong Park, Young Mok Jeong
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Publication number: 20220328940Abstract: A secondary battery including an electrode assembly including a first electrode plate having a first electrode substrate tab thereon, a second electrode plate having a second electrode substrate tab thereon, and a separator between the first electrode plate and the second electrode plate; a pouch accommodating the electrode assembly; and strip terminals respectively welded to the first electrode substrate tab and the second electrode substrate tab, wherein the first electrode substrate tab and one of the strip terminals are welded to one another in a state in which the first electrode substrate tab and the one strip terminal are bent at least once, and the second electrode substrate tab and another of the strip terminals are welded to one another in a state in which the second electrode substrate tab and the other strip terminal are bent at least once.Type: ApplicationFiled: April 8, 2022Publication date: October 13, 2022Inventors: Joon Hong PARK, Hee Myeong SON, Jin Hwan KIM, Jin Sub PARK
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Patent number: 11469079Abstract: A substrate processing system for selectively etching a layer on a substrate includes an upper chamber region, an inductive coil arranged around the upper chamber region and a lower chamber region including a substrate support to support a substrate. A gas distribution device is arranged between the upper chamber region and the lower chamber region and includes a plate with a plurality of holes. A cooling plenum cools the gas distribution device and a purge gas plenum directs purge gas into the lower chamber. A surface to volume ratio of the holes is greater than or equal to 4. A controller selectively supplies an etch gas mixture to the upper chamber and a purge gas to the purge gas plenum and strikes plasma in the upper chamber to selectively etch a layer of the substrate relative to at least one other exposed layer of the substrate.Type: GrantFiled: March 14, 2017Date of Patent: October 11, 2022Assignee: LAM RESEARCH CORPORATIONInventors: Kwame Eason, Dengliang Yang, Pilyeon Park, Faisal Yaqoob, Joon Hong Park, Mark Kawaguchi, Ivelin Angelov, Ji Zhu, Hsiao-Wei Chang
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Patent number: 11374581Abstract: A technology related to an electronic circuit, specifically, a phase locked loop or a frequency synthesizing apparatus, is disclosed. The frequency synthesizing apparatus includes an injection locked frequency divider and a replica frequency divider having the same circuit configuration as the injection locked frequency divider. A control value required for self-oscillating at a target frequency using the replica frequency divider is determined. When the injection locked frequency divider fails injection locking on a first attempt, the injection locking may be attempted using the determined control value. On the first attempt, the control value of the injection locked frequency divider may be determined and stored in advance according to a temperature and a supply voltage.Type: GrantFiled: July 26, 2021Date of Patent: June 28, 2022Assignees: SKAIChips Co., Ltd., Research & Business Foundation SUNGKYUNKWAN UNIVERSITYInventors: Kang Yoon Lee, Jong Wan Jo, Young Gun Pu, Byeong Gi Jang, Joon Hong Park, Dong Soo Park, Jae Bin Kim, Yun Gwan Kim
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Publication number: 20220149787Abstract: A technology related to an electronic circuit, specifically, a phase locked loop or a frequency synthesizing apparatus, is disclosed. The frequency synthesizing apparatus includes an injection locked frequency divider and a replica frequency divider having the same circuit configuration as the injection locked frequency divider. A control value required for self-oscillating at a target frequency using the replica frequency divider is determined. When the injection locked frequency divider fails injection locking on a first attempt, the injection locking may be attempted using the determined control value. On the first attempt, the control value of the injection locked frequency divider may be determined and stored in advance according to a temperature and a supply voltage.Type: ApplicationFiled: July 26, 2021Publication date: May 12, 2022Applicants: SKAIChips Co., Ltd., Research & Business Foundation SUNGKYUNKWAN UNIVERSITYInventors: Kang Yoon LEE, Jong Wan JO, Young Gun PU, Byeong Gi JANG, Joon Hong PARK, Dong Soo PARK, Jae Bin KIM, Yun Gwan KIM
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Publication number: 20220132439Abstract: A power management apparatus, includes an artificial intelligence (Al) controller configured to monitor a user pattern, based on frequency band selection information of all users using a base station, to predict the user pattern, and a DC-DC converter configured to output a supply voltage based on the predicted user pattern.Type: ApplicationFiled: October 22, 2021Publication date: April 28, 2022Applicants: SKAICHIPS CO., LTD., Research & Business Foundation Sungkyunkwan UniversityInventors: Kang Yoon LEE, Jong Wan JO, Young Gun PU, Dong Soo PARK, Joon Hong PARK, Jae Bin KIM, Yun Gwan KIM
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Publication number: 20220117562Abstract: The present invention relates to an integrated circuit for processing biosignals, a biosignal processing apparatus, and a biosignal processing system, and the integrated circuit includes: a digital conversion unit for converting an analog biosignal input through a biosignal input terminal into a digital biodata; and an AI block for processing a plurality of biodata converted through the digital conversion unit according to an artificial intelligence processing flow, and outputting a result data according to processing of the plurality of biodata.Type: ApplicationFiled: August 5, 2021Publication date: April 21, 2022Applicants: SKAIChips Co., Ltd., Research & Business Foundation SUNGKYUNKWAN UNIVERSITYInventors: Kang Yoon LEE, Jong Wan JO, Young Gun PU, IMRAN ALI, Dong Gyu KIM, Joon Hong PARK, Dong Gyun KIM, Yun Gwan KIM, Jae Bin KIM, Dong Soo PARK, Sung June BYUN
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Publication number: 20210279129Abstract: A memory device includes a first comparison circuit suitable for comparing read data read from a plurality of memory cells with write data written in the memory cells and outputting a comparison result, a path selection circuit suitable for transferring selected data selected among the read data and test data as read path data based on the comparison result of the first comparison circuit, and an output data alignment circuit suitable for converting the read path data into serial data to output the serial data as output data.Type: ApplicationFiled: December 30, 2020Publication date: September 9, 2021Inventors: Seong Ju LEE, Joon Hong PARK, Young Mok JEONG
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Patent number: 10727089Abstract: A method for selectively etching one exposed material of a substrate relative to another exposed material of the substrate includes a) arranging the substrate in a processing chamber; b) setting a chamber pressure; c) setting an RF frequency and an RF power for RF plasma; d) supplying a plasma gas mixture to the processing chamber; e) striking the RF plasma in the processing chamber in one of an electric mode (E-mode) and a magnetic mode (H-mode); and f) during plasma processing of the substrate, changing at least one of the chamber pressure, the RF frequency, the RF power and the plasma gas mixture to switch from the one of the E-mode and the H-mode to the other of the E-mode and the H-mode.Type: GrantFiled: February 7, 2017Date of Patent: July 28, 2020Assignee: LAM RESEARCH CORPORATIONInventors: James Eugene Caron, Ivelin Angelov, Joon Hong Park, Dengliang Yang
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Patent number: 10699878Abstract: A chamber member of a plasma source is provided and includes a sidewall, a transition member, a top wall and an injector connecting member. The sidewall is cylindrically-shaped and surrounds an upper region of a substrate processing chamber. The transition member is connected to the sidewall. The top wall is connected to the transition member. The injector connecting member is connected to the top wall, positioned vertically higher than the sidewall, and configured to connect to a gas injector. Gas passes through the injector connecting member via the gas injector and into the upper region of the substrate processing chamber. A center height to low inner diameter ratio of the chamber member is 0.25-0.5 and/or a center height to outer height ratio of the chamber member is 0.4-0.85.Type: GrantFiled: February 9, 2017Date of Patent: June 30, 2020Assignee: LAM RESEARCH CORPORATIONInventors: James Eugene Caron, Ivelin Angelov, Jason Lee Treadwell, Joon Hong Park, Canfeng Lai
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Publication number: 20190221654Abstract: Provided are methods and apparatuses for removing a polysilicon layer on a wafer, where the wafer can include a nitride layer, a low-k dielectric layer, an oxide layer, and other films. A plasma of a hydrogen-based species and a fluorine-based species is generated in a remote plasma source, and the wafer is exposed to the plasma at a relatively low temperature to limit the formation of solid byproduct. In some implementations, the wafer is maintained at a temperature below about 60° C. The polysilicon layer is removed at a very high etch rate, and the selectivity of polysilicon over the nitride layer and the oxide layer is very high. In some implementations, the wafer is supported on a wafer support having a plurality of thermal zones configured to define a plurality of different temperatures across the wafer.Type: ApplicationFiled: March 26, 2019Publication date: July 18, 2019Inventors: Dengliang Yang, Kwame Eason, Faisal Yaqoob, Joon Hong Park
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Patent number: 10283615Abstract: Provided are methods and apparatuses for removing a polysilicon layer on a wafer, where the wafer can include a nitride layer, a low-k dielectric layer, an oxide layer, and other films. A plasma of a hydrogen-based species and a fluorine-based species is generated in a remote plasma source, and the wafer is exposed to the plasma at a relatively low temperature to limit the formation of solid byproduct. In some implementations, the wafer is maintained at a temperature below about 60° C. The polysilicon layer is removed at a very high etch rate, and the selectivity of polysilicon over the nitride layer and the oxide layer is very high. In some implementations, the wafer is supported on a wafer support having a plurality of thermal zones configured to define a plurality of different temperatures across the wafer.Type: GrantFiled: November 11, 2015Date of Patent: May 7, 2019Assignee: Novellus Systems, Inc.Inventors: Dengliang Yang, Kwame Eason, Faisal Yaqoob, Joon Hong Park
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Patent number: 10192751Abstract: A method for selectively etching a silicon nitride layer on a substrate includes arranging a substrate on a substrate support of a substrate processing chamber. The substrate processing chamber includes an upper chamber region, an inductive coil arranged outside of the upper chamber region, a lower chamber region including the substrate support and a gas dispersion device. The gas dispersion device includes a plurality of holes in fluid communication with the upper chamber region and the lower chamber region. The method includes supplying an etch gas mixture to the upper chamber region and striking inductively coupled plasma in the upper chamber region by supplying power to the inductive coil. The etch gas mixture etches silicon nitride, promotes silicon dioxide passivation and promotes polysilicon passivation. The method includes selectively etching the silicon nitride layer on the substrate and extinguishing the inductively coupled plasma after a predetermined period.Type: GrantFiled: September 21, 2016Date of Patent: January 29, 2019Assignee: LAM RESEARCH CORPORATIONInventors: Dengliang Yang, Faisal Yaqoob, Pilyeon Park, Helen H. Zhu, Joon Hong Park
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Patent number: 10147588Abstract: A system is provided and includes a substrate processing chamber, one or more injectors, and a controller. The one or more injectors inject an electronegative gas, a baseline electropositive gas, and an additional electropositive gas into the substrate processing chamber. The electronegative gas includes an etch precursor. The additional electropositive gas mixes with and increases electron density of a plasma in the substrate processing chamber. The controller is configured to set an amount, flow rate or pressure of the additional electropositive gas based on at least one of a pressure of the electronegative gas or an electron affinity level of the additional electropositive gas.Type: GrantFiled: February 8, 2017Date of Patent: December 4, 2018Assignee: LAM RESEARCH CORPORATIONInventors: Kwame Eason, James Eugene Caron, Ivelin Angelov, Joon Hong Park, Dengliang Yang
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Publication number: 20180269070Abstract: A substrate processing system for selectively etching a layer on a substrate includes an upper chamber region, an inductive coil arranged around the upper chamber region and a lower chamber region including a substrate support to support a substrate. A gas distribution device is arranged between the upper chamber region and the lower chamber region and includes a plate with a plurality of holes. A cooling plenum cools the gas distribution device and a purge gas plenum directs purge gas into the lower chamber. A surface to volume ratio of the holes is greater than or equal to 4. A controller selectively supplies an etch gas mixture to the upper chamber and a purge gas to the purge gas plenum and strikes plasma in the upper chamber to selectively etch a layer of the substrate relative to at least one other exposed layer of the substrate.Type: ApplicationFiled: March 14, 2017Publication date: September 20, 2018Inventors: Kwame Eason, Dengliang Yang, Pilyeon Park, Faisal Yaqoob, Joon Hong Park, Mark Kawaguchi, Ivelin Angelov, Ji Zhu, Hsiao-Wei Chang
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Patent number: 10066790Abstract: The present invention relates to a fluorescent lamp-type LED lighting device including: a case part formed to be elongated in one direction and having an open bottom surface which provides a reflection space on the inner side; a cover part provided on the bottom surface of the case part so that the light which is reflected and diffused in the case part is emitted; and multiple LEDs which emit the light from the cover part and the inner side of the case part such that the light is reflected and diffused on the inner side of the case part. According to the present invention, the LED light is emitted toward an indoor ceiling side, the reflection space is provided so as to reflect and diffuse the emitted LED light, and the light is emitted through a bottom surface part. Accordingly, no additional diffusion plate for surface emission is used and thus optical efficiency can be increased.Type: GrantFiled: June 24, 2015Date of Patent: September 4, 2018Assignee: GIGATERA INC.Inventors: Duk-Yong Kim, Min-Soo Kim, Joon-Hong Park, Sung-Hoon Yoon
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Publication number: 20180158692Abstract: Apparatuses for processing substrates are provided herein. Apparatuses include a plasma etch chamber having a showerhead and pedestal for holding a substrate having silicon nitride, at least one outlet for coupling to a vacuum, a solid non-functional silicon source, and a plasma generator. A solid silicon source may be upstream of a substrate, such as at or near a showerhead of a process chamber, or in a remote plasma generator. Apparatuses also include a plasma etch chamber, at least one outlet, a solid non-functional silicon source, a plasma generator, and a controller for controlling operations including instructions for causing introduction of a fluorinating gas and causing ignition of a plasma to form fluorine-containing etching species in the plasma etch chamber.Type: ApplicationFiled: January 23, 2018Publication date: June 7, 2018Inventors: Helen H. Zhu, Linda Marquez, Faisal Yaqoob, Pilyeon Park, Ivan L. Berry, III, Ivelin A. Angelov, Joon Hong Park
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Patent number: 9911620Abstract: Methods of selectively etching silicon nitride on a semiconductor substrate by providing silicon to the plasma to achieve high etch selectivity of silicon nitride to silicon-containing materials are provided. Methods involve providing silicon from a solid or fluidic silicon source or both. A solid silicon source may be upstream of a substrate, such as at or near a showerhead of a process chamber, or in a remote plasma generator. A silicon gas source may be flowed to the plasma during etch.Type: GrantFiled: April 1, 2015Date of Patent: March 6, 2018Assignee: Lam Research CorporationInventors: Helen H. Zhu, Linda Marquez, Faisal Yaqoob, Pilyeon Park, Ivan L. Berry, III, Ivelin A. Angelov, Joon Hong Park