Abstract: The present invention relates to a hardware high-speed computation combined RISC-V based computation device for supporting a user-defined instruction set and a method thereof which configures a hardware high-speed computation unit executing a user-defined function through a field programmable gate array (FPGA) in a single chip together with a RISC-V based computation device, executes general computation and user-defined computation in an instruction level, not a separate bus connection configuration, through a program using a RISC-V based instruction set including a user-defined instruction set, and provides flexibility capable of optionally changing the user-defined instruction set and a corresponding function and a method thereof.

Abstract: The present invention relates to a hardware high-speed computation combined RISC-V based computation device for supporting a user-defined instruction set and a method thereof which configures a hardware high-speed computation unit executing a user-defined function through a field programmable gate array (FPGA) in a single chip together with a RISC-V based computation device, executes general computation and user-defined computation in an instruction level, not a separate bus connection configuration, through a program using a RISC-V based instruction set including a user-defined instruction set, and provides flexibility capable of optionally changing the user-defined instruction set and a corresponding function and a method thereof.

Abstract: Provided are an apparatus and a method for resetting a transimpedance amplifier for low-power passive optical network equipment for improving the synchronization performance of an uplink burst signal by resetting the transimpedance amplifier for amplifying a received signal of an optical transceiver at a time point at which a frame of the uplink burst signal ends. There is an effect of improving the burst-mode clock and data reconstruction performance through simple analysis of a bit pattern and thus reducing a guard time or a number of repetitions of preambles by accurately identifying the time point at which the frame of the uplink burst signal ends without using a frame data analysis scheme to reset the transimpedance amplifier.

Abstract: Provided are a relay apparatus and a relay method for a passive optical network so as to largely extend a communicable distance while maintaining compatibility with existing network components. In the case of applying an optical relay to the passive optical network, a delay time is reduced by applying the optical relay so that entire transmission delay time considering the increased delay time may be within a preamble period of the upstream burst stream, thereby rapidly increasing a transmission distance of the passive optical network by using the optical relay.

Abstract: Provided are an apparatus and a method for resetting a transimpedance amplifier for low-power passive optical network equipment for improving the synchronization performance of an uplink burst signal by resetting the transimpedance amplifier for amplifying a received signal of an optical transceiver at a time point at which a frame of the uplink burst signal ends. There is an effect of improving the burst-mode clock and data reconstruction performance through simple analysis of a bit pattern and thus reducing a guard time or a number of repetitions of preambles by accurately identifying the time point at which the frame of the uplink burst signal ends without using a frame data analysis scheme to reset the transimpedance amplifier.

Abstract: Provided are a relay apparatus and a relay method for a passive optical network so as to largely extend a communicable distance while maintaining compatibility with existing network components. In the case of applying an optical relay to the passive optical network, a delay time is reduced by applying the optical relay so that entire transmission delay time considering the increased delay time may be within a preamble period of the upstream burst stream, thereby rapidly increasing a transmission distance of the passive optical network by using the optical relay.

Abstract: The present invention relates to an infinite wavelength antenna device, which includes: a board body made of a dielectric and having a slab structure; a feed part arranged on one surface of the board body, and generating a magnetic field when power is applied; and an MNG resonance part arranged on the board body so that a preset distance is maintained from the feed part and at least a portion thereof is placed within the magnetic field, grounded through both ends thereof, resonating at a specific frequency band when the magnetic field is generated, and having a negative permeability. In the present invention, as the infinite wavelength antenna device operates according to the infinite wavelength property, the resonant frequency band may be determined independently of the size of the antenna device. Hence, miniaturization of the infinite wavelength antenna device can be realized.

Abstract: The present invention relates to a planar composite right/left handed (CRLH) antenna, comprising: a substrate body which is made of dielectric materials, and which has a planer structure; a radiation line which is disposed on one side of the substrate body, and which is bent to form a slot for exposing a predetermined width of the substrate body through both ends thereof, and which resonates at a predetermined frequency band when fed; and a feeder line which is disposed on the outer side of the substrate body, which extends across the slot, and which feeds electric power to the radiation line. The planar CRLH antenna of the present invention is small in size, and expands a radiation area, thereby expanding an available frequency band, or using a dual frequency band.

Abstract: The present invention relates to an input interface providing USB apparatus which is capable of providing an input interface for a variety of external devices in Bluetooth communication with the USB apparatus without a separate input means by connecting the USB apparatus to USB ports of a terminal and sharing an input means of the terminal with the external devices, and an interface providing method. The input interface providing USB apparatus and method in accordance with the present invention is capable of providing an input interface for a variety of external devices in Bluetooth communication with the USB apparatus without a separate input means by connecting the USB apparatus to USB ports of a terminal and sharing an input means of the terminal with the external devices, thereby providing excellent user convenience.

Abstract: The present invention relates to an input interface providing USB apparatus which is capable of providing an input interface for a variety of external devices in Bluetooth communication with the USB apparatus without a separate input means by connecting the USB apparatus to USB ports of a terminal and sharing an input means of the terminal with the external devices, and an interface providing method. The input interface providing USB apparatus and method in accordance with the present invention is capable of providing an input interface for a variety of external devices in Bluetooth communication with the USB apparatus without a separate input means by connecting the USB apparatus to USB ports of a terminal and sharing an input means of the terminal with the external devices, thereby providing excellent user convenience.

Abstract: A connector and an interface device are provided. The connector includes: a plurality of contact locations having sequentially designated numbers; and a housing which houses the plurality of contact locations. The plurality of contact locations include: a first device pair contact location group which is configured to transmit data between a first pair of devices; a second device pair contact location group which is configured to transmit data between a second pair of devices; a third device pair contact location group which is configured to transmit data between a third pair of devices; and a fourth device pair contact location group which is configured to transmit data between a fourth pair of devices.

Abstract: The present invention relates to an infinite wavelength antenna device, which includes: a board body made of a dielectric and having a slab structure; a feed part arranged on one surface of the board body, and generating a magnetic field when power is applied; and an MNG resonance part arranged on the board body so that a preset distance is maintained from the feed part and at least a portion thereof is placed within the magnetic field, grounded through both ends thereof, resonating at a specific frequency band when the magnetic field is generated, and having a negative permeability. In the present invention, as the infinite wavelength antenna device operates according to the infinite wavelength property, the resonant frequency band may be determined independently of the size of the antenna device. Hence, miniaturization of the infinite wavelength antenna device can be realized.

Abstract: The present invention relates to a planar composite right/left handed (CRLH) antenna, comprising: a substrate body which is made of dielectric materials, and which has a planer structure; a radiation line which is disposed on one side of the substrate body, and which is bent to form a slot for exposing a predetermined width of the substrate body through both ends thereof, and which resonates at a predetermined frequency band when fed; and a feeder line which is disposed on the outer side of the substrate body, which extends across the slot, and which feeds electric power to the radiation line. The planar CRLH antenna of the present invention is small in size, and expands a radiation area, thereby expanding an available frequency band, or using a dual frequency band.

Abstract: The present invention relates to a digital to analog converter, to a return-to-zero digital to analog converter with improved wideband characteristics by enabling a return-to-zero output without separate clock and controller, and a converting method thereof. Since the return-to-zero digital to analog converter and the converting method thereof are capable of outputting an RZ output without directly providing a clock signal to an analog circuit by configuring a switch for generating a zero point signal and a differential pipeline for providing a differential signal to control the switch according to input digital data using a differential structure, the converter can provide wideband characteristics and high dynamic performance.

Abstract: The present invention relates to a direct digital frequency synthesizer using a variable sine wave-weighted digital to analog converter with improved size and efficiency and a synthesizing method thereof. The direct digital frequency synthesizer and the synthesizing method thereof are capable of simplifying a configuration for matching output data of a phase accumulator to sine wave amplitude without increase in complexity of a DAC by applying a nonlinear DAC for directly generating a current corresponding to base points with sine weights and a variable sine wave-weighted DAC for generating fine currents to be combined with variable weights based on the base points. Accordingly, it is possible to provide a high quality output, reduce a size and power consumption, and increase a speed.

Abstract: The present invention relates to a digital to analog converter, to a return-to-zero digital to analog converter with improved wideband characteristics by enabling a return-to-zero output without separate clock and controller, and a converting method thereof. Since the return-to-zero digital to analog converter and the converting method thereof are capable of outputting an RZ output without directly providing a clock signal to an analog circuit by configuring a switch for generating a zero point signal and a differential pipeline for providing a differential signal to control the switch according to input digital data using a differential structure, the converter can provide wideband characteristics and high dynamic performance.

Abstract: A signal generation apparatus includes a signal generation portion and a phase compensator. The phase compensator generates a phase error control signal that maintains a phase difference between the in-phase and quadrature-phase signals generated by the signal generation portion. The phase compensator includes an offset compensator and a delay compensator. The offset compensator is set to compensate for an offset voltage through the phase compensator. The delay compensator is set to compensate for a difference of delays through paths for the in-phase and quadrature-phase signals within the phase compensator.

Abstract: A signal generation apparatus includes a signal generation portion and a phase compensator. The phase compensator generates a phase error control signal that maintains a phase difference between the in-phase and quadrature-phase signals generated by the signal generation portion. The phase compensator includes an offset compensator and a delay compensator. The offset compensator is set to compensate for an offset voltage through the phase compensator. The delay compensator is set to compensate for a difference of delays through paths for the in-phase and quadrature-phase signals within the phase compensator.

Abstract: A charge pumping circuit allows pumping of the supply voltage in both the positive and negative directions, as a pair of clock signals having inverse phases are inputted. Power consumption is reduced and a high voltage is generated for writing and erasing data in non-volatile digital memories, even when a low voltage is applied.