Patents by Inventor Joon Kim

Joon Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12347111
    Abstract: Disclosed are a deep learning model optimization method and apparatus for medical image segmentation. A deep learning model optimization method for medical image segmentation includes: (a) initializing a model parameter; (b) updating the model parameter by performing model-agnostic meta learning (MAML) on a model based on sample batch and applying a gradient descent algorithm to a loss function; (c) setting an optimizer parameter as the updated model parameter, performing one-shot meta-learning on the model, and then updating the optimizer parameter by applying the gradient descent algorithm to the loss function; and (d) updating the model parameter by reflecting the updated optimizer parameter.
    Type: Grant
    Filed: December 28, 2023
    Date of Patent: July 1, 2025
    Assignee: CHUNG ANG UNIVERSITY INDUSTRY ACADEMIC COOPERATION FOUNDATION
    Inventors: Joon Ki Paik, Yeong Joon Kim, Dong Goo Kang, Yeong Heon Mok, Sun Kyu Kwon
  • Publication number: 20250209993
    Abstract: A pixel of a light-emitting display device includes a capacitor, a first transistor, a second transistor including a gate receiving a gate writing signal, a third transistor including a gate receiving a scan signal, a fourth transistor including a gate receiving a gate initialization signal, a fifth transistor including a gate receiving a first emission signal, a sixth transistor including a gate receiving a second emission signal, and a light-emitting diode. The scan signal and the gate writing signal may be provided at a first frequency, and the first emission signal, the second emission signal and the gate initialization signal may be provided at a second frequency higher than the first frequency.
    Type: Application
    Filed: March 13, 2025
    Publication date: June 26, 2025
    Inventors: Hyun Joon KIM, Jun Ki JEONG
  • Publication number: 20250210104
    Abstract: A memory device includes a plurality of memory cells, each being configured to perform in-memory computing; a storage unit storing data; and an operation circuit including a first capacitor and a second capacitor and configured to adjust a voltage charged to the first capacitor and a voltage charged to the second capacitor according to input data and storage data stored in the storage unit.
    Type: Application
    Filed: December 11, 2024
    Publication date: June 26, 2025
    Inventors: Jae-Joon KIM, Eunhwan KIM
  • Publication number: 20250207989
    Abstract: A two-dimensional (2D) pressure sensor includes a substrate, a pressure deformation layer on the substrate and configured to deform due to external pressure applied by a workpiece, a magnetic bump on the pressure deformation layer and configured to move due to the external pressure applied by the workpiece, a proximity sensor in the pressure deformation layer and configured to detect at least one of movement of the workpiece and movement the magnetic bump, and a tactile sensor in the pressure deformation layer and configured to detect deformation of the pressure deformation layer.
    Type: Application
    Filed: May 16, 2024
    Publication date: June 26, 2025
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hye Yeon YANG, Sang Joon KIM
  • Publication number: 20250212517
    Abstract: A display device may include a sub-pixel having a first area and a second area. The sub-pixel may include: a pixel circuit component in the first area, and including a transistor on a substrate; and an emission component in the second area, and including a light-emitting element, and a first electrode and a second electrode electrically connected to the light-emitting element. The transistor may include an active pattern located on the substrate, a source electrode connected to a first side of the active pattern, a drain electrode connected to a second side of the active pattern, and a gate electrode located on the active pattern. The active pattern, the source electrode, the drain electrode, the first electrode, and the second electrode may be in a same layer.
    Type: Application
    Filed: November 26, 2024
    Publication date: June 26, 2025
    Inventors: Buem Joon KIM, Hyun Deok IM
  • Publication number: 20250209026
    Abstract: Proposed is a memory device including a plurality of memory cells performing in-memory computing. Each of the plurality of memory cells includes a storage unit storing data, and an operation circuit that includes a capacitor and controls a voltage charged to the capacitor according to input data and storage data stored in the storage unit.
    Type: Application
    Filed: December 11, 2024
    Publication date: June 26, 2025
    Inventors: Jae-Joon KIM, Eunhwan KIM
  • Publication number: 20250209701
    Abstract: Disclosed herein are a multi-style transformation apparatus and method. The multi-style transformation apparatus may include a region segmentation unit configured to segment a region, a style of which is to be transformed, in a content image, a style transformation mask generation unit configured to generate a multi-channel mask for style application to each segmentation region, and a multi-style transformation model implemented as a pre-trained deep neural network in order to receive the content image and the multi-channel mask and output a multi-style transformed image.
    Type: Application
    Filed: December 16, 2024
    Publication date: June 26, 2025
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Bon-Woo HWANG, Ki-Nam KIM, Tae-Joon KIM, Seung-Uk YOON, Seung-Wook LEE, Seong-Jae LIM
  • Publication number: 20250210103
    Abstract: A memory device includes a plurality of memory cells; a plurality of bit lines respectively connected to the plurality of memory cells; a plurality of separation switches, each being arranged in a central separation region of each bit line for each bit line and separating the central separation region of each bit line in response to a separation signal or connecting separated central separation regions to each other in response to the separation signal; a plurality of sharing switches, each being arranged between adjacent bit lines and separating the adjacent bit lines from each other or connecting the adjacent bit lines to each other in response to a charge sharing signal; and at least one ground switch connected to one end portion of each bit line for each bit line and selectively grounding each bit line.
    Type: Application
    Filed: December 11, 2024
    Publication date: June 26, 2025
    Inventors: Jae-Joon KIM, Eunhwan KIM
  • Patent number: 12341208
    Abstract: A battery module includes a plurality of cell assemblies including a plurality of secondary batteries; a module housing including an accommodation space configured to accommodate the plurality of cell assemblies; and a blocking member configured to, when a gas pressure more than a predetermined gas pressure or a heat more than a predetermined temperature is generated in at least some cell assemblies among the plurality of cell assemblies, block the generated gas or heat from moving to the other cell assemblies.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: June 24, 2025
    Assignee: LG ENERGY SOLUTION, LTD.
    Inventors: Seung-Joon Kim, Jin-Hak Kong, Ja-Eon Gu, Min-Ho Kwon, Jae-Uk Ryu, Jeong Bin Yu, Young-Bum Cho
  • Patent number: 12341984
    Abstract: Systems, devices, apparatus, and methods, including computer programs encoded on storage media, for truncation error signaling and adaptive dither for lossy bandwidth compression are described. A processor may perform a truncation process for data, where the data is associated with display processing, image processing, or the data processing, where the truncation process for the data results in truncated data. The processor may compute a set of truncation error values associated with the truncation process for the truncated data. The processor may generate a set of residual samples for the truncated data. The processor may generate a bitstream based on the set of residual samples for the truncated data and the set of truncation error values associated with the truncation process.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: June 24, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Hyung Joon Kim, Wei-Jung Chien, Cheng-Teh Hsieh, Marta Karczewicz, Natan Jacobson, Tao Wang, Clara Ka Wah Sung, Andrew Edmund Turner
  • Publication number: 20250199769
    Abstract: An operation accelerator for processing an operation between floating-point data and integer data includes a data converter configured to receive one of the integer data and the floating-point data as first input data and to output integer operation target data; a data setting unit configured to divide the integer operation target data into units of a same size and to transmit the integer operation target data to an arithmetic unit; the arithmetic unit configured to perform a multiply and accumulation (MAC) operation on second input data received as an integer and the integer operation target data received from the data setting unit; and a merger configured to adjust an operation result of the arithmetic unit by compensating for an original scale omitted in a process of dividing the integer operation target data into the units of the same size.
    Type: Application
    Filed: December 17, 2024
    Publication date: June 19, 2025
    Inventors: Jae-Joon KIM, Jaeyong JANG, Yulhwa KIM
  • Publication number: 20250199699
    Abstract: A memory device including at least one memory cell includes a nonvolatile memory cell; a first switching element having one terminal connected to the nonvolatile memory cell and being switched according to input data; an inverter connected to a multiplication node to which the nonvolatile memory cell and the first switching element are connected; and a capacitor connected to an output node of the inverter, herein the memory cell performs in-memory computing, and the capacitor outputs a computational operation result between storage data stored in the nonvolatile memory cell and the input data.
    Type: Application
    Filed: December 11, 2024
    Publication date: June 19, 2025
    Inventors: Jae-Joon KIM, Munhyeon KIM, Eunhwan KIM
  • Publication number: 20250200138
    Abstract: An operation accelerator that performs an operation between a floating point matrix and an integer matrix includes a first buffer storing integer matrix data; a second buffer storing floating point matrix data; a data converter to convert the floating point matrix data into an integer; and an operator to perform multiplication on the integer matrix data and integer operation target matrix data output from the data converter, wherein the data converter includes a pre-aligner to find a maximum exponent value among multiple floating point values included in the floating point matrix data, perform pre-alignment for moving a mantissa of each of floating points by a difference between the maximum exponent value and an exponent value of each of the multiple floating point values, and generate the integer operation target matrix data based on mantissas of a preset number of high-order bits extracted from among mantissas of pre-aligned floating point values.
    Type: Application
    Filed: December 17, 2024
    Publication date: June 19, 2025
    Inventors: Jae-Joon KIM, Jaeyong JANG, Yulhwa KIM
  • Publication number: 20250202017
    Abstract: Disclosed are a battery assembly, and a battery pack and a vehicle including the same. A battery assembly according to an aspect of the present disclosure includes a plurality of stacked cell units each including at least one battery cell, and a support structure configured to support the plurality of cell units and maintain a stacked state of the plurality of cell units, wherein the support structure includes a coupling portion configured to be coupled to a transport structure used to transport the plurality of cell units.
    Type: Application
    Filed: July 12, 2023
    Publication date: June 19, 2025
    Applicant: LG Energy Solution, Ltd.
    Inventors: Woo-Yong Kwon, Jong-Mo Kang, Seung-Joon Kim, In-Soo Kim, Jin-Yong Park, Se-Yun Chung
  • Publication number: 20250200306
    Abstract: Provided are method and apparatus for writing and reproducing a multimedia service using a tag in order to provide an intuitive interface for a user using a multimedia service. The method includes selecting a multimedia service to be written; generating tag information identifying the selected multimedia service; and writing the generated tag information to a tag. Accordingly, multimedia service information and content information can be stored in a tag by being written to tag information using a common format, and thus the user can later execute a service operation by easily writing information of a desired service operation to a tag and then simply connecting the tag to a tag reading device.
    Type: Application
    Filed: January 17, 2025
    Publication date: June 19, 2025
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventors: Pil-seung YANG, Kuk-hyun HAN, Hark-joon KIM, Bo-hyun KYUNG, Myoung-soon CHOI, Dae-Hyun KIM, Sang-jun HAN, Bo-mi KIM
  • Publication number: 20250201524
    Abstract: Disclosed are a process gas providing apparatus that optimizes mixing of process gases in consideration of characteristics based on types of the process gases, and a substrate treating apparatus including the same. The process gas providing apparatus of the substrate treating apparatus includes: a mass flow controller (MFC) configured to control a flow rate of the process gas; and an MFC controller configured to control a settling time of the mass flow controller, wherein the MFC controller is configured to control the settling time based on a type of the process gas.
    Type: Application
    Filed: November 13, 2024
    Publication date: June 19, 2025
    Applicant: SEMES CO., LTD.
    Inventors: Tae Sung KIM, Hyung Joon KIM
  • Publication number: 20250200264
    Abstract: A wafer calculator and a method of fabricating the wafer calculator are provided. The wafer calculator includes: processing elements each having a respective dedicated semiconductor pattern that is configured to perform an operation of a respectively corresponding partial area among partial areas of an artificial intelligence (AI) model; and routing elements that are each configured to provide a communication path for exchanging operation results of the operations of the partial areas according to a network structure of the AI model.
    Type: Application
    Filed: November 25, 2024
    Publication date: June 19, 2025
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chi Sung BAE, Lae-hoon KIM, Sang Joon KIM, Jongwoo LEE
  • Publication number: 20250190298
    Abstract: A method of operating a computing device includes performing a pre-boot memory test on a memory by a BIOS (Basic Input/Output System), recording, in a log, memory fail information generated as a result of performing the pre-boot memory test by the BIOS, and performing a page offline operation using the memory fail information, after an operating system (OS) of the computing device is installed.
    Type: Application
    Filed: July 16, 2024
    Publication date: June 12, 2025
    Inventors: Jong Won JEONG, Sung-Joon KIM, Il Ho KIM, Won Jae SHIN, Ho-Young LEE, Jin Hun JEONG
  • Publication number: 20250189465
    Abstract: An X-ray inspection device according to one embodiment of the present disclosure includes: an X-ray output portion irradiating X-rays to a battery including a cathode, a separator, and an anode in a stacking direction of the cathode and the anode; an X-ray detection portion acquiring a plurality of gray values based the X-rays that have transmitted through the battery; a signal processing portion acquiring an X-ray image including the plurality of gray values; and an inspection portion determining whether the battery is defective based on a distance between a first edge of an anode area including gray values representing the anode layer and a second edge of a cathode area including gray values representing the cathode layer in the X-ray image.
    Type: Application
    Filed: March 3, 2023
    Publication date: June 12, 2025
    Inventors: Hyung Joon KIM, Dong Whan SHIN
  • Publication number: 20250187509
    Abstract: The present invention provides a multistage armrest structure including a shaft installed on a seat and mounted at one end to rotate relative to an armrest, a housing attached to the armrest, through which the other end of the shaft passes, and supporting the shaft in the installed stat on the armrest, a pair of brackets fixed to the shaft, a ratchet rotatably mounted on a hinge member attached to the pair of brackets, a sector gear unit attached to the armrest to rotate together and engaging with the ratchet, and an elastic member disposed between the bracket and the ratchet, applying rotational directional elastic force for engagement between ratchet gear teeth formed on the ratchet and sector gear teeth formed on the sector gear unit and simultaneously preventing axial movement of the ratchet between the pair of brackets.
    Type: Application
    Filed: December 26, 2023
    Publication date: June 12, 2025
    Inventors: Yoon Ju Jang, Young Joon Kim, Min Kyu Kim