Patents by Inventor Joon-Sik Shin

Joon-Sik Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090250253
    Abstract: Disclosed are a printed circuit board and a manufacturing method thereof. The method of manufacturing a printed circuit board in accordance with an embodiment of the present invention includes: providing a first resin layer having a first pattern on one surface thereof; forming a conductive bump, which is electrically connected to the first pattern, on one surface of the first resin layer; compressing an insulation layer and the first resin layer such that the conductive bump passes through the insulation layer; laminating a second resin layer, which has a second pattern on a surface thereof facing the insulation layer, on the insulation layer; and forming an opening by etching a part of at least one of the first resin layer and the second resin layer.
    Type: Application
    Filed: October 15, 2008
    Publication date: October 8, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ho-Sik Park, Keung-Jin Sohn, Joon-Sik Shin, Sang-Youp Lee, Joung-Gul Ryu, Jung-Hwan Park, Jee-Soo Mok
  • Publication number: 20090242248
    Abstract: A method of manufacturing an insulating sheet can include: providing a reinforcement material on which a thermoplastic resin layer is stacked, stacking the thermoplastic resin layer stacked on the reinforcement material over a core substrate, and hot pressing the reinforcement material and the thermoplastic resin layer onto the core substrate. This method can be used to produce an insulation board that has a coefficient of thermal expansion close to that of the semiconductor chip, and thereby prevent bending or warpage in the printed circuit board using the insulation board. Furthermore, the stress in the connecting material can be reduced, so that cracking or delamination in the connecting material may be avoided, while heat-releasing performance may also be improved.
    Type: Application
    Filed: December 23, 2008
    Publication date: October 1, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Keungjin Sohn, Nobuyuki Ikeguchi, Joung-Gul Ryu, Ho-Sik Park, Sang-Youp Lee, Joon-Sik Shin, Jung-Hwan Park
  • Publication number: 20090236038
    Abstract: A method for manufacturing an insulating sheet, a method for manufacturing a metal clad laminate, and a method for manufacturing a printed circuit board are disclosed. The method for manufacturing an insulating sheet may include stacking a thermoplastic resin layer over a reinforcement material, and hot pressing the thermoplastic resin layer into the reinforcement material to impregnate and attach the thermoplastic resin layer into the reinforcement material. Certain embodiments of the invention can be utilized to produce an insulation board that has a coefficient of thermal expansion close to that of the semiconductor chip, and thereby prevent bending or warpage in the multi-layer printed circuit board using the insulation board. Furthermore, the stress in the material connecting the semiconductor chip with the printed circuit board can be reduced, so that cracking or delamination in the connecting material, such as lead-free solder, may be avoided.
    Type: Application
    Filed: August 20, 2008
    Publication date: September 24, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD
    Inventors: Nobuyuki Ikeguchi, Keungjin Sohn, Joon-Sik Shin, Joung-Gul Ryu, Jung-Hwan Park, Ho-Sik Park
  • Publication number: 20090084595
    Abstract: A method of manufacturing a printed circuit board includes stacking a solder resist layer on one side of a carrier; forming a first circuit pattern, which includes a first electrode pad, on the solder resist layer; forming a conductive post on the first electrode pad; stacking and pressing the carrier onto an insulation layer stacked in an inner substrate, such that the conductive post faces the insulation layer; and removing the carrier. As the conductive posts are pressed into the insulation layers to implement interlayer connections, certain drilling processes for forming via holes may be omitted, so that the degree of freedom can be increased in designing the circuits, and the circuits can be made to have greater densities. As the circuit patterns are buried in the insulation layers, the board can be made thinner, and the attachment areas can be increased, to allow greater adhesion.
    Type: Application
    Filed: January 28, 2008
    Publication date: April 2, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jung-Hwan Park, Keungjin Sohn, Joon-Sik Shin, Sang-Youp Lee, Ho-Sik Park, Joung-Gul Ryu
  • Publication number: 20090026604
    Abstract: A semiconductor plastic package and a method of fabricating the semiconductor plastic package are disclosed. A method of fabricating a semiconductor plastic package can include: providing a core board, which includes at least one pad, and which has a coefficient of thermal expansion of 9 ppm/° C. or lower; stacking a build-up insulation layer over the core board; forming an opening by removing a portion of the build-up insulation layer such that the pad is exposed to the exterior; and placing a semiconductor chip in the opening and electrically connecting the semiconductor chip with the pad. This method can be utilized to provide higher reliability in the connection between the semiconductor chip and the circuit board.
    Type: Application
    Filed: July 2, 2008
    Publication date: January 29, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Joon-Sik Shin, Nobuyuki Ikeguchi, Keungjin Sohn, Joung-Gul Ryu, Sang-Youp Lee, Jung-Hwan Park, Ho-Sik Park
  • Publication number: 20090008136
    Abstract: A multilayered printed circuit board and a method of fabricating the printed circuit board are disclosed. The method of fabricating the multilayered printed circuit board can include: providing a core substrate, which has an outer circuit, and which has a thermal expansion coefficient of 10 to 20 ppm/° C. at ?60 to 150° C.; stacking a stress-relieving insulation layer, which has a thermal expansion coefficient of ?20 to 6 ppm/° C., on either side of the core substrate; and forming a metal layer on the insulation layer and forming at least one pad and electrically connecting the pad with the outer circuit. This method can provide high reliability, as the stress-relieving insulation layers can prevent bending and warpage, etc., in the board overall.
    Type: Application
    Filed: June 25, 2008
    Publication date: January 8, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Nobuyuki Ikeguchi, Keungjin Sohn, Joon-Sik Shin