Abstract: A probe card inspection wafer includes a base wafer and first and second probe card inspection chips on the base wafer and apart from each other, wherein each of the first and second probe card inspection chips located on the base wafer is divided into a probe vertical-level inspection region, a probe horizontal-position inspection region, and contact inspection regions, wherein the first and second probe card inspection chips include first pad arrays located on the probe vertical-level inspection region and configured for inspecting vertical levels of first and second alternating-current (AC) probes of a probe card to be inspected, and second pad arrays located on the probe vertical-level inspection region and configured for inspecting vertical levels of first and second VSS probes of the probe card to be inspected.

Abstract: A probe card inspection wafer includes a base wafer and first and second probe card inspection chips on the base wafer and apart from each other, wherein each of the first and second probe card inspection chips located on the base wafer is divided into a probe vertical-level inspection region, a probe horizontal-position inspection region, and contact inspection regions, wherein the first and second probe card inspection chips include first pad arrays located on the probe vertical-level inspection region and configured for inspecting vertical levels of first and second alternating-current (AC) probes of a probe card to be inspected, and second pad arrays located on the probe vertical-level inspection region and configured for inspecting vertical levels of first and second VSS probes of the probe card to be inspected.

Abstract: Provided is a probe card inspection apparatus including: a substrate; a first insulating layer which covers the substrate; and a first detection unit which is formed on the first insulating layer and detects physical defects of a probe of a probe card. The first detection unit includes: a ground detection unit including a first conductive pattern which defines a plurality of openings which expose a portion of the first insulating layer and detect defects of a ground probe of the probe card and; and a signal and power detection unit including a second conductive pattern which defines a plurality of openings which expose another portion of the first insulating layer and detect defects of a signal and power supply probe of the probe card.

Abstract: Provided is a probe card inspection apparatus including: a substrate; a first insulating layer which covers the substrate; and a first detection unit which is formed on the first insulating layer and detects physical defects of a probe of a probe card. The first detection unit includes: a ground detection unit including a first conductive pattern which defines a plurality of openings which expose a portion of the first insulating layer and detect defects of a ground probe of the probe card and; and a signal and power detection unit including a second conductive pattern which defines a plurality of openings which expose another portion of the first insulating layer and detect defects of a signal and power supply probe of the probe card.

Abstract: Provided is a method of performing a parallel test on semiconductor devices, the method including coupling a power signal line to a set of at least two semiconductor devices through a switching device, performing at least one part of a parallel test on the set of semiconductor devices, and disconnecting a semiconductor device from the set in response to determining that the semiconductor device is defective as a result of the at least one part of the parallel test.

Abstract: A semiconductor device having a circuit for detecting a defective connection to the semiconductor device. A semiconductor device including multiple internal circuits; multiple pads respectively connected to the internal circuits; and a contact failure detector coupled between the pads and a common node and configured to detect contact failures between tips of a probe card and the pads.

Abstract: A semiconductor device having a circuit for detecting a defective connection to the semiconductor device. A semiconductor device including multiple internal circuits; multiple pads respectively connected to the internal circuits; and a contact failure detector coupled between the pads and a common node and configured to detect contact failures between tips of a probe card and the pads.

Abstract: Provided is a method of performing a parallel test on semiconductor devices, the method including coupling a power signal line to a set of at least two semiconductor devices through a switching device, performing at least one part of a parallel test on the set of semiconductor devices, and disconnecting a semiconductor device from the set in response to determining that the semiconductor device is defective as a result of the at least one part of the parallel test.

Abstract: Provided is a method of performing a parallel test on semiconductor devices, the method including coupling a power signal line to a set of at least two semiconductor devices through a switching device, performing at least one part of a parallel test on the set of semiconductor devices, and disconnecting a semiconductor device from the set in response to determining that the semiconductor device is defective as a result of the at least one part of the parallel test.

Abstract: Provided is a method of performing a parallel test on semiconductor devices, the method including coupling a power signal line to a set of at least two semiconductor devices through a switching device, performing at least one part of a parallel test on the set of semiconductor devices, and disconnecting a semiconductor device from the set in response to determining that the semiconductor device is defective as a result of the at least one part of the parallel test.

Abstract: A probe card is provided which includes a plurality of stacked signal printed circuit boards for transmitting signals, and a plurality of ground printed circuit boards respectively interposed between the signal printed circuit boards. To reduce ground noise, each of the ground printed circuit boards includes a plurality of conductive ground regions which are insulated from each other.

Abstract: A test apparatus is provided which includes a substrate retainer, a probe card, a tester, a test head, and a main controller. The substrate retainer is for holding a substrate having a plurality of chips. The probe card has an array of probes aligned in rows and columns, and each of the probes is for contacting respective chips of the substrate held by the retainer and each includes a plurality of probe needles. The tester conducts a test routine by generating test signals and by receiving and analyzing return signals, and the test head is for sending the test signals from the tester to the probe card, and for sending the return signals from the probe card to the tester. The main controller includes a test result database for storing test data analyzed by the tester, and for executing a cleaning error detection program to determine whether the test data contains cleaning errors resulting from a lack of cleanliness of the probe needles of the probes.

Abstract: An apparatus and method for cleaning debris and residue from a multitude of electrical contacts of a test probe card of an integrated circuit test probe apparatus preferably comprises a silicon wafer having a grooved surface into which the test probe card is moved into pressurized contact. The grooved surface provides a grating structure that when combined with the pressurized electrical contacts will crush any intervening or attached residue particles, which will then break into smaller particles and fall away from the probe card. Pressure and relative movement of the probe card may be controlled by a variety of measurement sensors.

Abstract: An apparatus and method for cleaning debris and residue from a multitude of electrical contacts of a test probe card of an integrated circuit test probe apparatus preferably comprises a silicon wafer having a grooved surface into which the test probe card is moved into pressurized contact. The grooved surface provides a grating structure that when combined with the pressurized electrical contacts will crush any intervening or attached residue particles, which will then break into smaller particles and fall away from the probe card. Pressure and relative movement of the probe card may be controlled by a variety of measurement sensors.

Abstract: A test apparatus is provided which includes a substrate retainer, a probe card, a tester, a test head, and a main controller. The substrate retainer is for holding a substrate having a plurality of chips. The probe card has an array of probes aligned in rows and columns, and each of the probes is for contacting respective chips of the substrate held by the retainer and each includes a plurality of probe needles. The tester conducts a test routine by generating test signals and by receiving and analyzing return signals, and the test head is for sending the test signals from the tester to the probe card, and for sending the return signals from the probe card to the tester. The main controller includes a test result database for storing test data analyzed by the tester, and for executing a cleaning error detection program to determine whether the test data contains cleaning errors resulting from a lack of cleanliness of the probe needles of the probes.

Abstract: A probe card is provided which includes a plurality of stacked signal printed circuit boards for transmitting signals, and a plurality of ground printed circuit boards respectively interposed between the signal printed circuit boards. To reduce ground noise, each of the ground printed circuit boards includes a plurality of conductive ground regions which are insulated from each other.

Abstract: An apparatus and method for cleaning debris and residue from a multitude of electrical contacts of a test probe card of an integrated circuit test probe apparatus preferably comprises a silicon wafer having a grooved surface into which the test probe card is moved into pressurized contact. The grooved surface provides a grating structure that when combined with the pressurized electrical contacts will crush any intervening or attached residue particles, which will then break into smaller particles and fall away from the probe card. Pressure and relative movement of the probe card may be controlled by a variety of measurement sensors.

Abstract: An apparatus for attaching an object semi-automatically onto a dummy wafer comprising a stage having a loading surface on which the dummy wafer rests, a pressing device for attaching the object gradually onto the dummy wafer placed on the loading surface, and a supporting device for placing the object in a position spaced apart from the loading surface.

Abstract: An apparatus for attaching an object semi-automatically onto a dummy wafer comprising a stage having a loading surface on which the dummy wafer rests, a pressing device for attaching the object gradually onto the dummy wafer placed on the loading surface, and a supporting device for placing the object in a position spaced apart from the loading surface.