Patents by Inventor Joon Young Kwak

Joon Young Kwak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220230059
    Abstract: Provided is a method of operating a neuron in a neuromorphic system. The method includes evaluating a membrane potential value at a corresponding time when receiving an input spike, time-modulating a synaptic weight of the membrane potential value and converting the time-modulated synaptic weight into a membrane potential value at a reference time, and generating an output spike when the membrane potential value at the reference time exceeds a certain threshold value. The membrane potential value at the reference time is represented by a floating point number including a predetermined bit of exponent and mantissa, and the floating point number includes time information. The method further includes accessing a memory and scanning a neural state variable when a timer is updated to “0” to update the neural state variable to an updated value at a reference time.
    Type: Application
    Filed: January 19, 2022
    Publication date: July 21, 2022
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jong Kil PARK, In Ho KIM, Su Youn LEE, Jong Keuk PARK, Joon Young KWAK, Jae Wook KIM, Yeon Joo JEONG
  • Publication number: 20220230060
    Abstract: A neuromorphic device includes: a neuron block unit including a plurality of neurons; a synapse block unit including a plurality of synapses; and a topology block unit including a plurality of parallel Look-Up Table (LUT) modules including pre and post neuron elements configured with addresses of a presynaptic neuron and a postsynaptic neuron. Each of the plurality of neurons has an intrinsic address, each of the plurality of synapses has an intrinsic address. The parallel LUT module is partitioned based on a first synapse address among synapse addresses, and each of the partitions is indexed based on a second synapse address among the synapse addresses.
    Type: Application
    Filed: July 5, 2019
    Publication date: July 21, 2022
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Vladimir KORNIJCUK, Doo Seok JEONG, Joon Young KWAK, Jae Wook KIM, Jong Kil PARK, In Ho KIM, Jong Keuk PARK, Su Youn LEE, Yeon Joo JEONG, Joon Yeon CHANG
  • Publication number: 20220156565
    Abstract: Embodiments of inventive concepts relate to a neuromorphic circuit including a flash memory-based spike regulator capable of generating a stable spike signal with a small number of devices. The neuromorphic circuit may generate a simple and stable spike signal using a flash memory-based spike regulator. Therefore, it is possible to implement a semiconductor neuromorphic circuit at low power and low cost by using the spike regulator of the present invention. Example embodiments of inventive concepts provide a neuromorphic circuit comprising a control signal generator for generating a control signal for generating a pulse signal; and a spike regulator for generating a spike signal in response to the control signal.
    Type: Application
    Filed: March 18, 2021
    Publication date: May 19, 2022
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Joon Young KWAK, Suyoun LEE, Inho KIM, Jong-Keuk PARK, Kyeong Seok LEE, Jaewook KIM, Jongkil PARK, YeonJoo JEONG, Gyuweon HWANG
  • Publication number: 20220138546
    Abstract: A neuromorphic circuit according to example embodiments of inventive concepts includes a first neuron array including a plurality of neuron circuits generating a spike signal; a first synapse array including a plurality of first synapse circuits to process and output the spike signal transmitted from the first neuron array; a second synapse array including a plurality of second synapse circuits; a first connecting block positioned between the first synapse array and the second synapse array and connecting the first synapse array and the second synapse array in response to a control signal; and a control logic to generate the control signal. The neuromorphic circuit may easily expand the size of the synapse element array to a desired size by using a connecting block.
    Type: Application
    Filed: March 18, 2021
    Publication date: May 5, 2022
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Joon Young KWAK, Suyoun LEE, Inho KIM, Jong-Keuk PARK, Kyeong Seok LEE, Jaewook KIM, Jongkil PARK, YeonJoo JEONG, Gyuweon HWANG
  • Publication number: 20210089893
    Abstract: An embodiment of the present disclosure discloses a method of process variation compensating through activation value adjustment of an analog binarized neural network circuit that may recover a decrease in recognition rate performance up to an almost perfect level, even if a binarized neural network is implemented as an analog circuit such that recognition rate performance is decreased due to process variation.
    Type: Application
    Filed: December 31, 2019
    Publication date: March 25, 2021
    Inventors: Ki Young CHOI, Jae Hyun KIM, Chae Un LEE, Joonyeon CHANG, Joon Young KWAK, Jaewook KIM
  • Publication number: 20200117983
    Abstract: An artificial neuron device according to an embodiment of the present disclosure includes a first resistor connected between an input terminal and a first node; a capacitor connected between the first node and a ground terminal; a threshold switch connected between the first node and a second node; and a second resistor connected between the second node and the ground terminal, wherein, when an input voltage of a certain level is applied to the input terminal by time, a membrane potential occurs at the first node and a spike current flows through the second node. According to present disclosure, the artificial neuron device expresses the Integrate-and-Fire function, the rate coding ability, the SFA characteristics, and the chaotic activity of the biological neuron, and therefore may be widely used for the artificial neuron network device, the large-scale brain-inspired computing system, and the artificial intelligence (AI) system.
    Type: Application
    Filed: July 30, 2019
    Publication date: April 16, 2020
    Inventors: Suyoun LEE, Joon Young KWAK, Hyunsu JU, Byung-Ki CHEONG
  • Publication number: 20180161818
    Abstract: Most vibration generators that use rotating eccentric masses of prior arts have disadvantages in controlling vibration magnitude such as stopping equipment, adjusting intermittently, or limitation on control range. In the present invention to continuously change the direction of a generated vibration force or its magnitude, the principle of synthesizing simple harmonic motions by phase shifting is used and two methods, called a mechanical phase shifting and a motor speed controlled phase shifting, are provided. A mechanical phase shifting device includes an angle adjusting plate to change the phases of two eccentric mass rotators and two pairs of gears and links for a reverse rotation of eccentric masses. A motor speed controlled phase shifting is enabled by acceleration and deceleration of a motor. A moment generator comprises two sets of eccentric mass vibrators connected by extending shafts between them and can be used for industry shakers, stabilizer's for floating bodies, and so on.
    Type: Application
    Filed: January 29, 2015
    Publication date: June 14, 2018
    Inventors: Byung Man Kwak, Joon Young Kwak, Kyung Woon Kwak
  • Patent number: 8565484
    Abstract: A forest fire smoke detection method using random forest classification is provided. In the method, a first reference value is set. For consecutively captured frames, images between the frames are compared, each block, in which a number of pixels, motions of which have been identified, is equal to or greater than the first reference value, is set as a candidate block, and a keyframe is selected. The selected keyframe is compared with at least one frame previous to the keyframe and then a plurality of feature vectors are extracted from the candidate blocks. The extracted feature vectors are learned using different random forest algorithms. Probabilities output to terminal nodes for classes are accumulated, and two first cumulative probability histograms are generated. The two first cumulative probability histograms are averaged, and then a second cumulative probability histogram is generated. A detected state of each candidate block is determined.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: October 22, 2013
    Assignee: Industry Academic Cooperation Foundation Keimyung University
    Inventors: ByoungChul Ko, JaeYeal Nam, Joon Young Kwak
  • Publication number: 20130094699
    Abstract: A forest fire smoke detection method using random forest classification is provided. In the method, a first reference value is set. For consecutively captured frames, images between the frames are compared, each block, in which a number of pixels, motions of which have been identified, is equal to or greater than the first reference value, is set as a candidate block, and a keyframe is selected. The selected keyframe is compared with at least one frame previous to the keyframe and then a plurality of feature vectors are extracted from the candidate blocks. The extracted feature vectors are learned using different random forest algorithms. Probabilities output to terminal nodes for classes are accumulated, and two first cumulative probability histograms are generated. The two first cumulative probability histograms are averaged, and then a second cumulative probability histogram is generated. A detected state of each candidate block is determined.
    Type: Application
    Filed: February 8, 2012
    Publication date: April 18, 2013
    Applicant: INDUSTRY ACADEMIC COOPERATION FOUNDATION KEIMYUNG UNIVERSITY
    Inventors: ByoungChul KO, JaeYeal NAM, Joon Young KWAK
  • Patent number: 8355279
    Abstract: A nonvolatile memory includes a plurality of N-bit multi-level cell (MLC) memory cells and a controller. The plurality of N-bit MLC memory cells are for storing N pages of data, each of the MLC memory cells programmable into any one of 2N threshold voltage distributions, where N is a positive number. The controller is configured to program the N pages of data into the MLC memory cells, and to execute a partial interleave process in which the N pages of data are divided into M page groups, where M is a positive number and where each page group includes at least one of the N pages of data, and in which each of the M page groups is applied to an error correction code (ECC) circuit to generate parity bits for the respective M page groups, where a bit-error rate (BER) among the pages within each of the M groups is equalized by the partial interleave process.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: January 15, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sangyong Yoon, Jinman Han, Kitae Park, Joon Young Kwak
  • Patent number: 8138741
    Abstract: A voltage generator is provided. The voltage generator includes a voltage pump and a voltage controller. The voltage pump generates a target voltage using a clock signal. The voltage controller compares a temporary voltage input from the voltage pump with a reference voltage to generate a control signal controlling the voltage pump. The voltage controller includes a string of a plurality of resistors connected in series to change a level of the temporary voltage to a voltage level of a corresponding comparison voltage. When the plurality of resistors are in a string, a resistance of a resistor closest to one end of the string is greater than resistances of other resistors of the string. The voltage controller may further include a jumping unit controlling connection or disconnection of two arbitrary nodes among first to n-th nodes (where n is a natural number) defined as connection points of the adjacent resistors of the string.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: March 20, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-kook Kim, Joon Young Kwak
  • Patent number: 8040736
    Abstract: A nonvolatile memory device including a memory cell; a word line coupled to the memory cell; a drive line; a switch coupled between the word line and the drive line, and configured to electrically connect the word line and the drive line; and a voltage generator coupled to the drive line and configured to charge the drive line to a precharge voltage. The precharge voltage is higher than a bias voltage applied to the word line during a corresponding operation on the memory cell.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: October 18, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Joon Young Kwak
  • Patent number: 7990129
    Abstract: A reference voltage generating circuit provides a stabilized reference voltage and includes; a clock generator providing a clock signal, a high voltage generator providing a pumping voltage in response to the clock signal, a ripple eradicator providing a static voltage by removing voltage ripple from the pumping voltage, and a reference voltage generator providing the reference voltage.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: August 2, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joon Young Kwak, Yoon-Hee Choi, Jin-Yub Lee, You-Sang Lee, Bo-Geun Kim
  • Publication number: 20110075478
    Abstract: A nonvolatile memory includes a plurality of N-bit multi-level cell (MLC) memory cells and a controller. The plurality of N-bit MLC memory cells are for storing N pages of data, each of the MLC memory cells programmable into any one of 2N threshold voltage distributions, where N is a positive number.
    Type: Application
    Filed: September 15, 2010
    Publication date: March 31, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sangyong Yoon, Jinman Han, Kitae Park, Joon Young Kwak
  • Publication number: 20100001710
    Abstract: A reference voltage generating circuit provides a stabilized reference voltage and includes; a clock generator providing a clock signal, a high voltage generator providing a pumping voltage in response to the clock signal, a ripple eradicator providing a static voltage by removing voltage ripple from the pumping voltage, and a reference voltage generator providing the reference voltage.
    Type: Application
    Filed: June 2, 2009
    Publication date: January 7, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joon Young KWAK, Yoon-Hee CHOI, Jin-Yub LEE, You-Sang LEE, Bo-Geun KIM
  • Publication number: 20090296490
    Abstract: A nonvolatile memory device including a memory cell; a word line coupled to the memory cell; a drive line; a switch coupled between the word line and the drive line, and configured to electrically connect the word line and the drive line; and a voltage generator coupled to the drive line and configured to charge the drive line to a precharge voltage. The precharge voltage is higher than a bias voltage applied to the word line during a corresponding operation on the memory cell.
    Type: Application
    Filed: April 30, 2009
    Publication date: December 3, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Joon-Young Kwak
  • Publication number: 20090072799
    Abstract: A voltage generator is provided. The voltage generator includes a voltage pump and a voltage controller. The voltage pump generates a target voltage using a clock signal. The voltage controller compares a temporary voltage input from the voltage pump with a reference voltage to generate a control signal controlling the voltage pump. The voltage controller includes a string of a plurality of resistors connected in series to change a level of the temporary voltage to a voltage level of a corresponding comparison voltage. When the plurality of resistors are in a string, a resistance of a resistor closest to one end of the string is greater than resistances of other resistors of the string. The voltage controller may further include a jumping unit controlling connection or disconnection of two arbitrary nodes among first to n-th nodes (where n is a natural number) defined as connection points of the adjacent resistors of the string.
    Type: Application
    Filed: September 12, 2008
    Publication date: March 19, 2009
    Inventors: Jin-Kook Kim, Joon Young Kwak