Patents by Inventor Joon Young Yang

Joon Young Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11456236
    Abstract: A vertical semiconductor device including a plurality of vertical memory cells on an upper surface of a first substrate, an adhesive layer on a lower surface of the first substrate that is opposite to the upper surface of the first substrate, a second substrate having first peripheral circuits thereon, a lower insulating interlayer on the second substrate, and a plurality of wiring structures electrically connecting the vertical memory cells and the first peripheral circuits. A lower surface of the adhesive layer and an upper surface of the lower insulating interlayer may be in contact with each other.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: September 27, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-Sung Yang, Joon-Sung Lim, Sung-Min Hwang, Ji-Young Kim, Ji-Won Kim
  • Publication number: 20220287571
    Abstract: An apparatus for estimating bio-information is disclosed. The apparatus may include: a pulse wave sensor configured to measure a pulse wave signal from an object; a force sensor configured to obtain a force signal by measuring an external force exerted onto the force sensor; and a processor configured to obtain a first input value, a second input value, and a third input value based on the pulse wave signal and the force signal, to extract a feature vector by inputting the first input value, the second input value, and the third input value into a first neural network model, and to obtain the bio-information by inputting the feature vector into a second neural network model.
    Type: Application
    Filed: July 7, 2021
    Publication date: September 15, 2022
    Applicants: SAMSUNG ELECTRONICS CO., LTD., IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Sang Kon BAE, Joon-Hyuk CHANG, Jin Woo CHOI, Youn Ho KIM, Jehyun KYUNG, Joon-Young YANG, Inmo YEON, Jeong-Hwan CHOI
  • Publication number: 20220015651
    Abstract: An apparatus for and a method for estimating blood pressure are provided. The apparatus for estimating blood pressure includes: a sensor configured to measure a pulse wave signal from an object; and a processor configured to obtain a mean arterial pressure (MAP) based on the pulse wave signal, configured to classify a phase of the obtained MAP according to at least one classification criterion, and to obtain a systolic blood pressure (SBP) by using an estimation model corresponding to the classified phase of the MAP among estimation models corresponding to respective phases of the MAP.
    Type: Application
    Filed: November 13, 2020
    Publication date: January 20, 2022
    Applicants: SAMSUNG ELECTRONICS CO., LTD., IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)
    Inventors: Sang Kon Bae, Joon-Hyuk Chang, Chang Mok Choi, Youn Ho Kim, Jin Woo Choi, Jehyun Kyung, Tae-Jun Park, Joon-Young Yang, Inmo Yeon
  • Patent number: 11176950
    Abstract: Disclosed herein are an apparatus and method for recognizing a voice speaker. The apparatus for recognizing a voice speaker includes a voice feature extraction unit configured to extract a feature vector from a voice signal inputted through a microphone; and a speaker recognition unit configured to calculate a speaker recognition score by selecting a reverberant environment from multiple reverberant environment learning data sets based on the feature vector extracted by the voice feature extraction unit and to recognize a speaker by assigning a weight depending on the selected reverberant environment to the speaker recognition score.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: November 16, 2021
    Assignee: Hyundai Mobis Co., Ltd.
    Inventors: Yu Jin Jung, Ki Hee Park, Chang Won Lee, Doh Hyun Kim, Tae Kyung Kim, Tae Yoon Son, Joon Hyuk Chang, Joon Young Yang
  • Publication number: 20190295553
    Abstract: Disclosed herein are an apparatus and method for recognizing a voice speaker. The apparatus for recognizing a voice speaker includes a voice feature extraction unit configured to extract a feature vector from a voice signal inputted through a microphone; and a speaker recognition unit configured to calculate a speaker recognition score by selecting a reverberant environment from multiple reverberant environment learning data sets based on the feature vector extracted by the voice feature extraction unit and to recognize a speaker by assigning a weight depending on the selected reverberant environment to the speaker recognition score.
    Type: Application
    Filed: March 20, 2019
    Publication date: September 26, 2019
    Inventors: Yu Jin JUNG, Ki Hee PARK, Chang Won LEE, Doh Hyun KIM, Tae Kyung KIM, Tae Yoon SON, Joon Hyuk CHANG, Joon Young YANG
  • Publication number: 20180276680
    Abstract: Disclosed herein is an online certification mark publication system. The online certification mark publication system includes: a certification mark registration unit configured to register and store a certification mark; an object construction unit configured to accept a registration of an object from a publisher terminal, to also accept a registration of a certification mark assigned to the registered object, and to set hierarchy between registered objects; a module generation unit configured to generate a certification mark module; and a module request processing unit configured to, when a request for a certification mark is received from the certification mark module inserted into the online page, transmit the certification mark of the published object and information about an inheritable certification mark in response to the request, wherein the certification mark is inherited based on the hierarchy between the objects.
    Type: Application
    Filed: September 6, 2016
    Publication date: September 27, 2018
    Inventor: Joon Young YANG
  • Patent number: 9923068
    Abstract: An array substrate includes an oxide semiconductor layer; an etch stopper including a first contact hole exposing each of both sides of the oxide semiconductor layer; source and drain electrodes spaced apart from each other with the oxide semiconductor layer therebetween; a first passivation layer including a contact hole exposing each of both ends of the oxide semiconductor layer and each of ends of the source and drain electrode that oppose the both ends of the oxide semiconductor layer, respectively; and a connection pattern at the second contact hole contacting both the oxide semiconductor layer and each of the source and drain electrodes.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: March 20, 2018
    Assignee: LG DISPLAY CO., LTD.
    Inventor: Joon-Young Yang
  • Publication number: 20170084707
    Abstract: An array substrate includes an oxide semiconductor layer; an etch stopper including a first contact hole exposing each of both sides of the oxide semiconductor layer; source and drain electrodes spaced apart from each other with the oxide semiconductor layer therebetween; a first passivation layer including a contact hole exposing each of both ends of the oxide semiconductor layer and each of ends of the source and drain electrode that oppose the both ends of the oxide semiconductor layer, respectively; and a connection pattern at the second contact hole contacting both the oxide semiconductor layer and each of the source and drain electrodes.
    Type: Application
    Filed: December 1, 2016
    Publication date: March 23, 2017
    Inventor: Joon-Young Yang
  • Patent number: 9543339
    Abstract: An array substrate includes an oxide semiconductor layer; an etch stopper including a first contact hole exposing each of both sides of the oxide semiconductor layer; source and drain electrodes spaced apart from each other with the oxide semiconductor layer therebetween; a first passivation layer including a contact hole exposing each of both ends of the oxide semiconductor layer and each of ends of the source and drain electrode that oppose the both ends of the oxide semiconductor layer, respectively; and a connection pattern at the second contact hole contacting both the oxide semiconductor layer and each of the source and drain electrodes.
    Type: Grant
    Filed: November 11, 2014
    Date of Patent: January 10, 2017
    Assignee: LG Dislay Co., Ltd.
    Inventor: Joon-Young Yang
  • Patent number: 9111807
    Abstract: A thin film transistor substrate includes: pluralities of gate lines and data lines arranged to define a plurality of pixel regions, and a plurality of thin film transistors formed on the pixel regions in such a manner as to include first and second thin film transistors connected to the same gate line and the pixel regions adjacent to each other. Each of the first and second thin film transistors includes: a gate electrode connected to the gate line; a semiconductor layer formed on the gate line in an octagon shape; a source electrode connected to the data line; and a drain electrode formed in an opposite shape to the source electrode.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: August 18, 2015
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Hun Jang, Joon Young Yang, Gyu Tae Kang
  • Publication number: 20150064842
    Abstract: An array substrate includes an oxide semiconductor layer; an etch stopper including a first contact hole exposing each of both sides of the oxide semiconductor layer; source and drain electrodes spaced apart from each other with the oxide semiconductor layer therebetween; a first passivation layer including a contact hole exposing each of both ends of the oxide semiconductor layer and each of ends of the source and drain electrode that oppose the both ends of the oxide semiconductor layer, respectively; and a connection pattern at the second contact hole contacting both the oxide semiconductor layer and each of the source and drain electrodes.
    Type: Application
    Filed: November 11, 2014
    Publication date: March 5, 2015
    Inventor: Joon-Young Yang
  • Patent number: 8912539
    Abstract: An array substrate includes an oxide semiconductor layer; an etch stopper including a first contact hole exposing each of both sides of the oxide semiconductor layer; source and drain electrodes spaced apart from each other with the oxide semiconductor layer therebetween; a first passivation layer including a contact hole exposing each of both ends of the oxide semiconductor layer and each of ends of the source and drain electrode that oppose the both ends of the oxide semiconductor layer, respectively; and a connection pattern at the second contact hole contacting both the oxide semiconductor layer and each of the source and drain electrodes.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: December 16, 2014
    Assignee: LG Display Co., Ltd.
    Inventor: Joon-Young Yang
  • Publication number: 20140159034
    Abstract: An array substrate includes an oxide semiconductor layer; an etch stopper including a first contact hole exposing each of both sides of the oxide semiconductor layer; source and drain electrodes spaced apart from each other with the oxide semiconductor layer therebetween; a first passivation layer including a contact hole exposing each of both ends of the oxide semiconductor layer and each of ends of the source and drain electrode that oppose the both ends of the oxide semiconductor layer, respectively; and a connection pattern at the second contact hole contacting both the oxide semiconductor layer and each of the source and drain electrodes.
    Type: Application
    Filed: August 14, 2013
    Publication date: June 12, 2014
    Inventor: Joon-Young Yang
  • Publication number: 20140138691
    Abstract: A thin film transistor substrate includes: pluralities of gate lines and data lines arranged to define a plurality of pixel regions, and a plurality of thin film transistors formed on the pixel regions in such a manner as to include first and second thin film transistors connected to the same gate line and the pixel regions adjacent to each other. Each of the first and second thin film transistors includes: a gate electrode connected to the gate line; a semiconductor layer formed on the gate line in an octagon shape; a source electrode connected to the data line; and a drain electrode formed in an opposite shape to the source electrode.
    Type: Application
    Filed: November 19, 2013
    Publication date: May 22, 2014
    Applicant: LG DISPLAY CO., LTD.
    Inventors: Hun Jang, Joon Young Yang, Gyu Tae Kang
  • Patent number: 8670081
    Abstract: An array substrate for a liquid crystal display device includes a data line formed on a substrate including a pixel region; a source electrode extending from the data line; a drain electrode separated from the source electrode; a pixel electrode contacting the drain electrode and formed of a transparent conductive material in the pixel region; an organic semiconductor layer on the source and drain electrodes; a first gate insulating layer of an organic insulating material on the organic semiconductor layer; a second gate insulting layer of an inorganic insulating material on entire surface of the substrate including the first gate insulating layer; a gate line formed on the second gate insulating layer and crossing the data line to define the pixel region; and a gate electrode on the second gate insulating layer extending from the gate line and corresponding to the organic semiconductor layer.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: March 11, 2014
    Assignee: LG Display Co. Ltd.
    Inventor: Joon-Young Yang
  • Patent number: 8599348
    Abstract: The present disclosure relates to a horizontal electric field type liquid crystal display device having the horizontal electric fields over the pixel electrodes and the common electrodes which are disposed on the same level plane, and a method for manufacturing the same. The horizontal electric field type liquid crystal display device comprising: a substrate; a gate line and a data line crossing each other with a gate insulating layer therebetween, and defining a pixel area on the substrate; a thin film transistor formed where the gate line and the data line is crossing; a pixel electrode contacting the thin film transistor on the gate insulating layer; a common electrode disposed in parallel with the pixel electrode having a predetermined distance; and a passivation layer covering whole surface of the substrate including the pixel electrode and the common electrode.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: December 3, 2013
    Assignee: LG Display Co., Ltd.
    Inventors: Joon-Young Yang, Jung-Il Lee
  • Patent number: 8497507
    Abstract: An array substrate for a liquid crystal display device includes a gate line on a substrate; a gate insulating layer on the gate line; a data line crossing the gate line; a gate electrode connected to the gate line; an active layer on the gate insulating layer and overlapping the gate electrode; first and second ohmic contact layers on the active layer, the first and second ohmic contact layers spaced apart from each other by a first distance; first and second barrier patterns spaced apart from each other by the first distance and on the first and second ohmic contact layers, respectively. The active layer is exposed through the first and second barrier patterns; source and drain electrodes spaced apart from each other by a second distance greater than the first distance and on the first and second barrier patterns, respectively.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: July 30, 2013
    Assignee: LG Display Co., Ltd.
    Inventor: Joon-Young Yang
  • Patent number: 8482710
    Abstract: A liquid crystal display and a fabricating method thereof are provided. The liquid crystal display includes a first substrate having a pixel portion and a pad portion; a gate line and a data line crossing each other to define the pixel portion at the pixel portion; a transistor adjacent to a crossing of the gate line and the data line, the transistor including a gate electrode, a source electrode and a drain electrode; an insulating layer above the source electrode and the drain electrode, the insulating layer exposing a lateral side of the drain electrode; a pixel electrode in contact with the lateral side of the drain electrode; a second substrate attached to the first substrate; and a liquid crystal layer between the first substrate and a second substrate.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: July 9, 2013
    Assignee: LG Display Co., Ltd.
    Inventors: Joon-Young Yang, Jung-Il Lee
  • Patent number: 8435722
    Abstract: A method for fabricating a liquid crystal display includes: forming a gate electrode on a substrate; sequentially providing an insulation layer, a semiconductor layer and an etch stopper layer on the gate electrode; patterning the etch stopper layer and the semiconductor layer to form an etch stopper layer pattern and a semiconductor layer pattern; removing both side portions of the etch stopper layer pattern to expose the lower semiconductor layer pattern portion; forming a conductive layer on an entire surface of the substrate; patterning the conductive layer to form source and drain electrodes and defining a channel region; forming a passivation layer having a contact part on the entire surface of the substrate; and forming a pixel electrode connected with the drain electrode via the contact part on the passivation layer. An etch stopper can be used without additionally performing a masking process.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: May 7, 2013
    Assignee: LG Display Co., Ltd.
    Inventors: Dong-Su Shin, Joon-Young Yang, Jung-Il Lee
  • Patent number: 8390752
    Abstract: Provided are a display device and a fabricating method thereof. The display device includes a substrate, a gate line, a common line, common electrodes, an insulating layer, a data line, a drain electrode, and pixel electrodes. The gate line is disposed in a first direction. The common line is disposed substantially parallel to the gate line. The common electrodes branch from the common line. The insulating layer covers the gate line, the common line, and the common electrodes. The channel patterns are disposed on the insulating layer to correspond to the gate electrode. The data line is disposed in a second direction. The drain electrode is electrically connected with the channel pattern. The pixel electrodes are formed of an opaque metal. Thus, the display device may improve contrast ratio.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: March 5, 2013
    Assignee: LG Display Co., Ltd.
    Inventors: Joon Young Yang, Soo Pool Kim