Abstract: A neural processing unit (NPU) mounted on a movable device for detecting object is provided. The NPU may comprise a plurality of processing elements (PEs), configured to process an operation of a first artificial neural network model (ANN) and an operation of a second ANN different from the first ANN; a memory configured to store a portion of a data of the first ANN and the second ANN; and a controller configured to control the PEs and the memory to selectively perform a convolution operation of the first ANN or the second ANN based on a determination data, wherein the determination data may include an object detection performance data of the first ANN and the second ANN, respectively.

Abstract: A neural processing unit (NPU) for decoding video or feature map is provided. The NPU may comprise at least one processing element (PE) to perform an inference using an artificial neural network. The at least one PE may be configured to receive and decode data included in a bitstream. The data included in the bitstream may comprise data of a base layer. Alternatively, the data included in the bitstream may comprise data of the base layer and data of at least one enhancement layer. The data of the base layer included in the bitstream may include a first feature map. The data of the at least one enhancement layer included in the bitstream may include a second feature map.

Abstract: An electronic device mounted on a fixed or a movable apparatus is provided. The electronic device may comprise a neural processing unit (NPU), including a plurality of processing elements (PEs), configured to process an operation of an artificial neural network model trained to detect or track at least one object and output an inference result based on at least one image acquired from at least one camera; and a signal generator generating a signal applicable to the at least one camera.

Abstract: An electronic device mounted on a fixed or a movable apparatus is provided. The electronic device may comprise an image signal processor (ISP) for at least one camera; a neural processing unit (NPU), including a plurality of processing elements (PEs), configured to: process an operation of an artificial neural network model trained to detect or track at least one object, based on an input feature map generated from at least one image, which is acquired via the ISP from the at least one camera, and output an inference result; and a signal generator generating a signal applicable to the at least one camera or the ISP.

Abstract: An electronic device mounted on a fixed or a movable apparatusapparatus is provided. The electronic device may comprise an image signal processor (ISP) for at least one camera; a neural processing unit (NPU), including a plurality of processing elements (PEs), configured to: process an operation of an artificial neural network model trained to detect or track at least one object, based on an input feature map generated from at least one image, which is acquired via the ISP from the at least one camera, and output an inference result; and a signal generator generating a signal applicable to the at least one camera or the ISP.

Abstract: According to an example of the present disclosure, a neural processing unit (NPU) capable of encoding is provided. The NPU comprises one or more processing elements (PEs) which perform operations for a plurality of layers of an artificial neural network and generate a plurality of output feature maps. The NPU also comprises an encoder which encodes at least one particular output feature map among a plurality of output feature maps into a bitstream and then transmits thereof.

Abstract: An electronic device mounted on a fixed or a movable apparatus is provided. The electronic device may comprise a neural processing unit (NPU), including a plurality of processing elements (PEs), configured to process an operation of an artificial neural network model trained to detect or track at least one object and output an inference result based on at least one image acquired from at least one camera; and a signal generator generating a signal applicable to the at least one camera.

Abstract: A neural processing unit (NPU) for decoding video or feature map is provided. The NPU may comprise at least one processing element (PE) to perform an inference using an artificial neural network. The at least one PE may be configured to receive and decode data included in a bitstream. The data included in the bitstream may comprise data of a base layer. Alternatively, the data included in the bitstream may comprise data of the base layer and data of at least one enhancement layer. The data of the base layer included in the bitstream may include a first feature map. The data of the at least one enhancement layer included in the bitstream may include a second feature map.

Abstract: A neural processing unit (NPU) mounted on a movable device for detecting object is provided. The NPU may comprise a plurality of processing elements (PEs), configured to process an operation of a first artificial neural network model (ANN) and an operation of a second ANN different from the first ANN; a memory configured to store a portion of a data of the first ANN and the second ANN; and a controller configured to control the PEs and the memory to selectively perform a convolution operation of the first ANN or the second ANN based on a determination data, wherein the determination data may include an object detection performance data of the first ANN and the second ANN, respectively.

Abstract: An electronic device mounted on a fixed or a movable apparatus is provided. The electronic device may comprise a neural processing unit (NPU), including a plurality of processing elements (PEs), configured to process an operation of an artificial neural network model trained to detect or track at least one object and output an inference result based on at least one image acquired from at least one camera; and a signal generator generating a signal applicable to the at least one camera.

Abstract: An electronic device mounted on a fixed or a movable apparatusapparatus is provided. The electronic device may comprise an image signal processor (ISP) for at least one camera; a neural processing unit (NPU), including a plurality of processing elements (PEs), configured to: process an operation of an artificial neural network model trained to detect or track at least one object, based on an input feature map generated from at least one image, which is acquired via the ISP from the at least one camera, and output an inference result; and a signal generator generating a signal applicable to the at least one camera or the ISP.

Abstract: A neural processing unit (NPU) for decoding video or feature map is provided. The NPU may comprise at least one processing element (PE) to perform an inference using an artificial neural network. The at least one PE may be configured to receive and decode data included in a bitstream. The data included in the bitstream may comprise data of a base layer. Alternatively, the data included in the bitstream may comprise data of the base layer and data of at least one enhancement layer. The data of the base layer included in the bitstream may include a first feature map. The data of the at least one enhancement layer included in the bitstream may include a second feature map.

Abstract: A neural processing unit (NPU) for decoding video and/or feature map, the NPU may comprise at least one processing element (PE) for an artificial neural network, the at least one PE configured to receive and decode a bitstream. The bitstream may be received in a unit of data frame. One data frame of the bitstream may include a weight for an artificial neural network model, data of a base layer, and data of at least one enhancement layer. The data of the base layer included in the one data frame may include a first feature map, and the data of the at least one enhancement layer included in the one data frame may include a second feature map.

Abstract: By controlling shapes of internal electrodes, when short-circuit occurs between the internal electrodes, a short-circuited portion may be opened by an overcurrent, to serve as a fuse. Also, by controlling shapes of internal electrodes, equivalent series inductance (ESL) at a high frequency may be reduced.

Abstract: A multilayer electronic component includes a body including a first internal electrode and a second internal electrode alternately disposed in a first direction with a dielectric layer interposed therebetween, and including a first surface and a second surface opposing each other in the first direction, a third surface and a fourth surface opposing each other in a second direction, and a fifth surface and a sixth surface opposing each other in a third direction. A first external electrode is disposed on the third, fourth, fifth, and sixth surfaces. A second external electrode is disposed on one or more of the first and second surfaces, and a via electrode is exposed through a surface on which the second external electrode is disposed. A ratio W/L is 0.95 or more and 1.05 or less, where L is a length of the body and W is a width of the body.

Abstract: A composite electronic component includes a capacitor structure including a dielectric layer, and a first internal electrode and a second internal electrode alternately arranged in a first direction, with the dielectric layer interposed therebetween; a fuse structure including a fuse and a fuse body; a common electrode disposed between one surface of the capacitor structure in a second direction, crossing the first direction, and one surface of the fuse structure in the second direction, and connected to the first internal electrode and the fuse; a first external electrode disposed on the other surface of the fuse structure in the second direction, and connected to the fuse; and a second external electrode disposed on the other surface of the capacitor structure in the second direction, and connected to the second internal electrode.

Abstract: A multilayer electronic component includes a body including a first internal electrode and a second internal electrode alternately disposed in a first direction with a dielectric layer interposed therebetween, and including a first surface and a second surface opposing each other in the first direction, a third surface and a fourth surface opposing each other in a second direction, and a fifth surface and a sixth surface opposing each other in a third direction. A first external electrode is disposed on the third, fourth, fifth, and sixth surfaces. A second external electrode is disposed on one or more of the first and second surfaces, and a via electrode is exposed through a surface on which the second external electrode is disposed. A ratio W/L is 0.95 or more and 1.05 or less, where L is a length of the body and W is a width of the body.

Abstract: By controlling shapes of internal electrodes, when short-circuit occurs between the internal electrodes, a short-circuited portion may be opened by an overcurrent, to serve as a fuse. Also, by controlling shapes of internal electrodes, equivalent series inductance (ESL) at a high frequency may be reduced.

Abstract: A composite electronic component includes a capacitor structure including a dielectric layer, and a first internal electrode and a second internal electrode alternately arranged in a first direction, with the dielectric layer interposed therebetween; a fuse structure including a fuse and a fuse body; a common electrode disposed between one surface of the capacitor structure in a second direction, crossing the first direction, and one surface of the fuse structure in the second direction, and connected to the first internal electrode and the fuse; a first external electrode disposed on the other surface of the fuse structure in the second direction, and connected to the fuse; and a second external electrode disposed on the other surface of the capacitor structure in the second direction, and connected to the second internal electrode.

Abstract: The present invention provides a method and electronic device for controlling transmission power.