Abstract: An array substrate for a transflective liquid crystal display device comprising a common electrode over a third passivation layer substantially all over a substrate, the common electrode having first openings and second openings corresponding to a transmissive area and a reflective area, respectively, wherein the first openings are spaced apart from each other and are parallel to a data line, and the second openings are spaced apart from each other and are slant at a predetermined angle with respect to the data line, wherein first ends of the first openings overlap a second gate line, second ends of the first openings overlap the common line, first ends of the second openings overlap the common line, and second ends of the second openings overlap a first gate line.

Abstract: An LCD device according to the present invention includes having first and second substrates facing each other gate and data lines crossing each other to define a pixel region, a thin film transistor including a gate electrode protruding from the gate line, a source electrode protruding from the data line and a drain electrode spaced from the source electrode at a predetermined interval, a metal pattern over a predetermined portion of the gate line, a passivation layer over the data line and the metal pattern to have a contact hole exposing the drain electrode and a storage hole exposing the metal pattern, a pixel electrode on the pixel region over the contact hole and the storage hole, a column spacer contacting with the pixel electrode through the storage hole and a liquid crystal layer between the first and second substrates.

Abstract: The present invention relates to a liquid crystal display panel and a method for fabricating the same which can improve aperture and prevent a brightness deviation between lots. The liquid crystal display panel includes a thin film transistor formed on a lower substrate and connected to a gate line and a data line, a pixel electrode connected to a drain electrode of the thin film transistor, a common electrode forming a horizontal electric field with the pixel electrode, a connection electrode overlapped with and connected to the data line, and a black matrix on an upper substrate opposite to the lower substrate for forming a vertical electric field with the connection electrode.

Abstract: An array substrate for a transflective liquid crystal display device includes a substrate, first and second gate lines on the substrate along a first direction, a common line parallel to and between the first and second gate lines, a gate electrode connected to the first gate line, a gate insulating layer on the first and second gate lines, the gate electrode and the common line, a data line over the gate insulating layer and along a second direction, the data line crossing the first and second gate lines to define a pixel region, the pixel region divided into a transmissive area and a reflective area by the common line, a semiconductor layer on the gate insulating layer over the gate electrode, source and drain electrodes over the semiconductor layer and spaced apart each other, a first passivation layer over the data line, the source electrode and the drain electrode substantially all over the substrate, a reflective layer over the first passivation layer in the reflective area, a second passivation layer o

Abstract: The present invention relates to a liquid crystal display panel and a method for fabricating the same which can improve aperture and prevent a brightness deviation between lots. The liquid crystal display panel includes a thin film transistor formed on a lower substrate and connected to a gate line and a data line, a pixel electrode connected to a drain electrode of the thin film transistor, a common electrode forming a horizontal electric field with the pixel electrode, a connection electrode overlapped with and connected to the data line, and a black matrix on an upper substrate opposite to the lower substrate for forming a vertical electric field with the connection electrode.

Abstract: Disclosed is a method for acquiring frame synchronization of a broadcasting channel (BCH) in an asynchronous mobile communication system. The method comprises acquiring system timing through a synchronization channel; performing CRC by demodulating for a predetermined time duration a primary common control physical channel (PCCPCH) based on the system information, re-designating a demodulating duration according to the CRC result, and performing CRC; and acquiring frame synchronization of the BCH when the CRC is consecutively passed at least two times.

Abstract: A method for acquiring frame synchronization of a broadcast channel (BCH) in an asynchronous mobile telecommunication system. The method according to the invention includes steps of acquiring a system timing through a synchronous channel (SCH), demodulating a primary common control physical channel (PCCPCH) based on the system timing, checking a cyclic redundancy check (CRC) by decoding a predetermined time interval of the demodulated PCCPCH, and acquiring frame synchronization of the BCH by reference to the CRC checked result.

Abstract: Disclosed is a method for acquiring frame synchronization of a broadcasting channel (BCH) in an asynchronous mobile communication system. The method comprises acquiring system timing through a synchronization channel; performing CRC by demodulating for a predetermined time duration a primary common control physical channel (PCCPCH) based on the system information, re-designating a demodulating duration according to the CRC result, and performing CRC; and acquiring frame synchronization of the BCH when the CRC is consecutively passed at least two times.

Abstract: A method for acquiring frame synchronization of a broadcast channel (BCH) in an asynchronous mobile telecommunication system. The method according to the invention includes steps of acquiring a system timing through a synchronous channel (SCH), demodulating a primary common control physical channel (PCCPCH) based on the system timing, checking a cyclic redundancy check (CRC) by decoding a predetermined time interval of the demodulated PCCPCH, and acquiring frame synchronization of the BCH by reference to the CRC checked result.