Patents by Inventor Joong Ha You

Joong Ha You has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7070831
    Abstract: A member for a semiconductor package and a semiconductor package using the member, and a method for fabricating the semiconductor package are provided to simply connect chip pads provided on a semiconductor chip to external terminals. With the member for the semiconductor package and the package using the member according to the present invention, the chip pads can simply be connected with the corresponding external terminals. In addition, since the electrical paths between the chip pads and the external leads are relatively shortened, thus the electric properties are improved. Further, since the external terminal balls can be arranged regardless of the location of the chip pads, the semiconductor package can be easily designed and the size of the package can approximate the chip size and the plurality of external balls can be provided. Also, since it is possible to perform the package process with either the wafer or the individual chip, an application range can be flexibly extended.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: July 4, 2006
    Assignee: Hyundai Electronics Industries Co.,Ltd.
    Inventor: Joong-Ha You
  • Publication number: 20030102548
    Abstract: A member for a semiconductor package and a semiconductor package using the member, and a method for fabricating the semiconductor package are provided to simply connect chip pads provided on a semiconductor chip to external terminals. With the member for the semiconductor package and the package using the member according to the present invention, the chip pads can simply be connected with the corresponding external terminals. In addition, since the electrical paths between the chip pads and the external leads are relatively shortened, thus the electric properties are improved. Further, since the external terminal balls can be arranged regardless of the location of the chip pads, the semiconductor package can be easily designed and the size of the package can approximate the chip size and the plurality of external balls can be provided. Also, since it is possible to perform the package process with either the wafer or the individual chip, an application range can be flexibly extended.
    Type: Application
    Filed: December 30, 2002
    Publication date: June 5, 2003
    Applicant: Hyundai Electronics Industries Co., Ltd.
    Inventor: Joong-Ha You
  • Patent number: 6521979
    Abstract: A member for a semiconductor package and a semiconductor package using the member, and a method for fabricating the semiconductor package are provided to simply connect chip pads provided on a semiconductor chip to external terminals. With the member for the semiconductor package and the package using the member according to the present invention, the chip pads can simply be connected with the corresponding external terminals. In addition, since the electrical paths between the chip pads and the external leads are relatively shortened, thus the electric properties are improved. Further, since the external terminal balls can be arranged regardless of the location of the chip pads, the semiconductor package can be easily designed and the size of the package can approximate the chip size and the plurality of external balls can be provided. Also, since it is possible to perform the package process with either the wafer or the individual chip, an application range can be flexibly extended.
    Type: Grant
    Filed: June 3, 1999
    Date of Patent: February 18, 2003
    Assignee: Hyundai Electronics Industries Co., Ltd
    Inventor: Joong-Ha You
  • Patent number: 6277670
    Abstract: A chip package according to an embodiment of the present invention includes an integrated chip having a plurality of chip pads formed thereon, and a passivation film formed in such a manner that the chip pads are exposed. A plurality of metal wirings are connected to the chip pads on the upper surface of the passivation film, and externals balls electrically connected to the metal wirings. A molding resin layer is formed on the upper portion of the semiconductor chip such that the upper surfaces of the external balls protrude therefrom.
    Type: Grant
    Filed: October 12, 1999
    Date of Patent: August 21, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Joong Ha You
  • Patent number: 5994783
    Abstract: A chip package according to an embodiment of the present invention includes an integrated chip having a plurality of chip pads formed thereon, and a passivation film formed in such a manner that the chip pads are exposed. A plurality of metal wirings are connected to the chip pads on the upper surface of the passivation film, and externals balls electrically connected to the metal wirings. A molding resin layer is formed on the upper portion of the semiconductor chip such that the upper surfaces of the external balls protrude therefrom.
    Type: Grant
    Filed: September 4, 1997
    Date of Patent: November 30, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventor: Joong Ha You
  • Patent number: 5977643
    Abstract: A chip-size semiconductor package and fabrication method is provided that reduces the size of the package. Further, the electrical path from the chip pads to the external leads is reduced to improve electrical characteristics. In addition, the external leads can be formed directly at the location of the chip pads. The chip-size semiconductor package has a passivation film is formed on a semiconductor chip excluding the chip pads thereon. Inner ends of conductive wires are vertically coupled to corresponding chip pads, respectively. Then, the semiconductor chip is sealed with a molding resin excluding the outer ends of the conductive wires that protrude. The outer ends can be formed as external leads having a shape, such as circular external balls, based on the intended use.
    Type: Grant
    Filed: June 17, 1997
    Date of Patent: November 2, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventors: Joong Ha You, Ki Bon Cha
  • Patent number: 5886404
    Abstract: A bottom lead semiconductor package includes a plurality of outer leads, wherein an outer portion of each of the outer leads is downwardly bent, and inner leads extend from a corresponding one of the outer leads respectively and are bent at least once upwardly and folded over onto a corresponding upper surface of the outer leads. A semiconductor chip is attached to an upper surface of each of the inner leads by a nonconductive adhesive, and a plurality of conductive wires or bumps electrically couples the chip to the inner leads. A molding compound seals a portion of the package including the chip, the inner leads and the wires, but externally exposes a downwardly bent portion of each of the outer leads.
    Type: Grant
    Filed: June 17, 1997
    Date of Patent: March 23, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventor: Joong-Ha You
  • Patent number: 5877546
    Abstract: An improved semiconductor package with a transparent window and a fabrication method thereof having a transparent window formed at a central portion of a semiconductor apparatus not providing a ceramic upper plate and adhesive, which includes a semiconductor chip; a ceramic plate for receiving the semiconductor chip; a lead frame sealed with the ceramic plate, the lead frame being angled and curved; a transparent window mounted on the upper portion of the lead frame; and a sealant provided at the ceramic plate and a side surface of the transparent window.
    Type: Grant
    Filed: January 2, 1996
    Date of Patent: March 2, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventor: Joong Ha You