Patents by Inventor Joong-Hyun Baek

Joong-Hyun Baek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100059880
    Abstract: A three-dimensional semiconductor module and an electronic system including the same are provided. The semiconductor module includes a module substrate, a logic device formed on a part of the module substrate, and a plurality of memory devices formed on another part of the module substrate, wherein the plurality of memory devices are disposed perpendicular to the logic device, and the module substrate on which the plurality of memory devices are formed is supported by a supporter. The electronic system includes the semiconductor module.
    Type: Application
    Filed: September 4, 2009
    Publication date: March 11, 2010
    Applicant: Samsung Electronics Co., Ltd
    Inventor: Joong-Hyun BAEK
  • Publication number: 20100038769
    Abstract: A wafer stacked semiconductor package (WSP) having a vertical heat emission path and a method of fabricating the same are provided. The WSP comprises a substrate on which semiconductor chips are mounted; a plurality of semiconductor chips stacked vertically on the substrate; a cooling through-hole formed vertically in the plurality of semiconductor chips, and sealed; micro holes formed on the circumference of the cooling through-hole; and coolant filling the inside of the cooling through-hole. Accordingly, the WSP reduces a temperature difference between the semiconductor chips and quickly dissipates the heat generated by the stacked semiconductor chips.
    Type: Application
    Filed: October 20, 2009
    Publication date: February 18, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joong-Hyun BAEK, Hee-Jin LEE
  • Patent number: 7626261
    Abstract: A wafer stacked semiconductor package (WSP) having a vertical heat emission path and a method of fabricating the same are provided. The WSP comprises a substrate on which semiconductor chips are mounted; a plurality of semiconductor chips stacked vertically on the substrate; a cooling through-hole formed vertically in the plurality of semiconductor chips, and sealed; micro holes formed on the circumference of the cooling through-hole; and a coolant filling the inside of the cooling through-hole. Accordingly, the WSP reduces a temperature difference between the semiconductor chips and quickly dissipates the heat generated by the stacked semiconductor chips.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: December 1, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joong-Hyun Baek, Hee-Jin Lee
  • Publication number: 20090273905
    Abstract: An integrated circuit package may include a board that may support an integrated circuit chip. A post pin may be provided on a surface of the board. The post pin may be electrically connected to the integrated circuit chip. A land pin may be provided on the other surface of the board. The land pin may be electrically connected to the integrated circuit chip.
    Type: Application
    Filed: July 10, 2009
    Publication date: November 5, 2009
    Inventors: Sang-Wook Park, Joong-Hyun Baek, Hyung-Gil Baek
  • Publication number: 20090186404
    Abstract: Provided is a nucleic acid amplifying apparatus having a uniform distribution of reaction temperature in a reaction space. The nucleic acid amplifying apparatus includes a substrate providing a polymerase chain reaction (PCR) space, and a plurality of heating units disposed above or below the reaction space to transfer heat to the reaction space, wherein the heating unit includes a plurality of heating units arranged substantially in parallel with each other, and among the plurality of heating units, the heating units disposed adjacent outermost portions of the reaction space have the largest heat radiation quantity.
    Type: Application
    Filed: December 11, 2008
    Publication date: July 23, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Young KIM, Joong-Hyun BAEK
  • Publication number: 20090129026
    Abstract: Provided are a heat sink and a heat sink semiconductor module assembly which may include an improved, cooling function. Each of the heat sinks may include a flat heat sink base having a first surface attached to semiconductor devices and a second surface externally exposed; first fins provided on a portion of the second surface of the heat sink base to which no clip is coupled; and second fins provided on portions of the second surface of the heat sink base to which a clip may be coupled. The semiconductor module assembly may secure the heat sinks to both surfaces of a semiconductor module using the clip. Accordingly, air may flow smoothly through the second fins on the portions to which the clip may be coupled, thereby improving the cooling function of the heat sinks.
    Type: Application
    Filed: November 14, 2008
    Publication date: May 21, 2009
    Inventors: Joong-hyun Baek, Hee-jin Lee, Sun-won Kang
  • Publication number: 20090130908
    Abstract: In a memory module, a gap filler for eliminating an air gap may be formed on an end of a PCB where a tab may be formed. The gap filler may be formed on a surface of a socket receiving the memory module. A grease may be coated on the tab to provide a heat conduction path away from the memory module.
    Type: Application
    Filed: December 29, 2008
    Publication date: May 21, 2009
    Inventors: Sang-Wook Park, Joong-Hyun Baek, Hae-Hyung Lee, Hee-Kook Choi, Jin-Yang Lee
  • Publication number: 20090057880
    Abstract: A semiconductor device capable of improving the efficiency of dispersing heat via a dummy pad. The semiconductor device may be included in a semiconductor package, stack module, card, or system. Also disclosed is a method of manufacturing the semiconductor device. In the semiconductor device, a semiconductor substrate has a first surface and a second surface opposite to the first surface, and at least one conductive pad is arranged on a predetermined region of the first surface. At least one dummy pad is arranged on the first or second surface, and is not electrically coupled to the at least one conductive pad. The dummy pad or pads may be used to disperse heat. Accordingly, it is possible to increase the efficiency of dispersing heat of a semiconductor device, thereby improving the yield of semiconductor devices.
    Type: Application
    Filed: June 10, 2008
    Publication date: March 5, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joong-Hyun BAEK, Sung-Jun IM
  • Patent number: 7485006
    Abstract: In a memory module, a gap filler for eliminating an air gap may be formed on an end of a PCB where a tab may be formed. The gap filler may be formed on a surface of a socket receiving the memory module. A grease may be coated on the tab to provide a heat conduction path away from the memory module.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: February 3, 2009
    Assignee: Samsung Electronics Co. Ltd.
    Inventors: Sang-Wook Park, Joong-Hyun Baek, Hae-Hyung Lee, Hee-Kook Choi, Jin-Yang Lee
  • Patent number: 7473993
    Abstract: A semiconductor stack package includes lower and upper individual packages. When the upper individual package is stacked on the lower individual package, a heat-conducting layer provided under the upper package touches a heat-mediating layer provided on the lower package. Thus, a layer of trapped air found in conventional stack packages is eliminated, and a direct heat-dissipating path is produced through both the heat-conducting layer and the heat-mediating layer. Therefore, the heat dissipation of the stack package is improved. Alternatively, the stack package may have a symmetric configuration in which each IC chip faces away from each other. A memory module has several stack packages mounted on one or both surfaces of a module board. The method includes forming the packages and stacking the packages. The method further includes forming a module board and mounting the stack packages on the module board.
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: January 6, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joong-Hyun Baek, Sang-Wook Park, Hae-Hyung Lee
  • Publication number: 20080141933
    Abstract: Provided is a semiconductor plating system for plating a semiconductor object with a desired layer. The semiconductor plating system include a plating tank configured to accommodate a plating solution for use in plating the semiconductor object, and a plating solution induction device configured to induce the plating solution to spirally flow toward the semiconductor object.
    Type: Application
    Filed: November 16, 2007
    Publication date: June 19, 2008
    Inventors: Cha-jea Jo, Joong-hyun Baek, Hee-jin Lee, Ku-young Kim, Ju-il Choi
  • Publication number: 20080144292
    Abstract: A semiconductor module, including a semiconductor device mounted on a printed circuit board (PCB), the PCB having an electrical connection to the semiconductor module, and a heat sink in direct contact with the semiconductor device, the heat sink being formed with a first end and a second end, the first end and the second end being formed with different heights, wherein the semiconductor module allows air flow to pass through the semiconductor module, radiating heat away from the heat sink. Another semiconductor module, including a semiconductor device mounted on a PCB, a heat sink in direct contact with the semiconductor device, the heat sink having a first portion and a second portion, wherein the first portion has a flat shape and is in direct contact with the semiconductor device and the second portion has a corrugated shape and is not in contact with the semiconductor device, wherein the semiconductor module allows air flow to pass through the semiconductor module, radiating heat away from the heat sink.
    Type: Application
    Filed: January 22, 2008
    Publication date: June 19, 2008
    Inventors: Hae-Hyung Lee, Sang-Wook Park, Joong-Hyun Baek, Jin-Yang Lee
  • Publication number: 20080099909
    Abstract: A wafer stacked semiconductor package (WSP) having a vertical heat emission path and a method of fabricating the same are provided. The WSP comprises a substrate on which semiconductor chips are mounted; a plurality of semiconductor chips stacked vertically on the substrate; a cooling through-hole formed vertically in the plurality of semiconductor chips, and sealed; micro holes formed on the circumference of the cooling through-hole; and a coolant filling the inside of the cooling through-hole. Accordingly, the WSP reduces a temperature difference between the semiconductor chips and quickly dissipates the heat generated by the stacked semiconductor chips.
    Type: Application
    Filed: October 29, 2007
    Publication date: May 1, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joong-Hyun BAEK, Hee-Jin LEE
  • Patent number: 7345882
    Abstract: A semiconductor module, including a semiconductor device mounted on a printed circuit board (PCB), the PCB having an electrical connection to the semiconductor module, and a heat sink in direct contact with the semiconductor device, the heat sink being formed with a first end and a second end, the first end and the second end being formed with different heights, wherein the semiconductor module allows air flow to pass through the semiconductor module, radiating heat away from the heat sink. Another semiconductor module, including a semiconductor device mounted on a PCB, a heat sink in direct contact with the semiconductor device, the heat sink having a first portion and a second portion, wherein the first portion has a flat shape and is in direct contact with the semiconductor device and the second portion has a corrugated shape and is not in contact with the semiconductor device, wherein the semiconductor module allows air flow to pass through the semiconductor module, radiating heat away from the heat sink.
    Type: Grant
    Filed: October 6, 2004
    Date of Patent: March 18, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hae-Hyung Lee, Sang-Wook Park, Joong-Hyun Baek, Jin-Yang Lee
  • Patent number: 7301233
    Abstract: The semiconductor chip package may include a substrate having circuit patterns and substrate pads connected with the circuit patterns. At least one semiconductor chip is mounted on the substrate, and a thermoelectric cooler having a P-type material plate and an N-type material plate is mounted on the semiconductor chip. Portions of the P-type and N-type material plates may be attached on the semiconductor chip. The P-type and N-type material plates may be electrically connected to the circuit patterns of the substrate to be provided with DC power.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: November 27, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hae-Hyung Lee, Sang-Wook Park, Joong-Hyun Baek, Dong-Ho Lee, Jin-Yang Lee
  • Publication number: 20070252257
    Abstract: In one embodiment, a semiconductor package structure includes a heat dissipative element connected to an internal circuit. The semiconductor package includes a semiconductor chip, an interconnection substrate, and a heat dissipative element. The semiconductor chip includes an internal circuit and inner pads that connect the internal circuit. The interconnection substrate is disposed below the semiconductor chip and includes input/output terminals. At least one of the inner pads is electrically connected to at least one of the input/output terminals. The heat dissipative element is disposed on the semiconductor chip and is electrically connected to at least one of the inner pads.
    Type: Application
    Filed: April 27, 2007
    Publication date: November 1, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joong-Hyun BAEK, Hee-Jin LEE, Hae-Hyung LEE, Sun-Won KANG
  • Publication number: 20070252271
    Abstract: Provided is a semiconductor memory module allowing a filling member formed between a module substrate and memory chips mounted on the module substrate to completely fill the space between the module substrate and the memory chips. According to embodiments of the present invention, the semiconductor memory module includes a module substrate having at least one memory chip mounted on the substrate such that its edges are oblique to major and minor axes bisecting the module substrate. The oblique orientation allows for an improved opening between memory chips formed on the substrate so that the filling member may be properly formed between the module substrate and the memory chips to prevent voids where the filling member is not formed.
    Type: Application
    Filed: April 26, 2007
    Publication date: November 1, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joong-Hyun BAEK, Sun-Won KANG, Moon-Jung KIM, Hyung-Gil BAEK, Hee-Jin LEE
  • Publication number: 20070170580
    Abstract: A cooling apparatus for a circuit module having a substrate extending axially with an IC chip of a first type and IC chips of a second type mounted thereon, comprising: a first heat spreading element disposed to form a heat conduction path with the IC chip of the first type; and a second heat spreading element disposed to form a heat conduction path with the IC chips of the second type, wherein there is at least one IC chip of the second type mounted axially away from opposite sides of the IC chip of the first type, wherein the first type of IC chip is capable of generating a larger amount of heat than the second type of IC chips, and the first heat spreading element has a higher thermal conductivity than the second heat spreading element.
    Type: Application
    Filed: September 27, 2006
    Publication date: July 26, 2007
    Inventors: Joong Hyun Baek, Yong Hyun Kim, Kwang Ho Chun, Chang Young Park, Hae Hyung Lee, Hee Jin Lee
  • Publication number: 20070069396
    Abstract: Example embodiments relate to a semiconductor package, a method of manufacturing the semiconductor package, a stacked semiconductor package including the semiconductor package, and a method of manufacturing the stacked semiconductor package. Other example embodiments relate to a semiconductor package having a structure that allows at least two packages to be stacked, a method of manufacturing the semiconductor package, a stacked semiconductor package including the semiconductor package, and a method of manufacturing the stacked semiconductor package.
    Type: Application
    Filed: September 25, 2006
    Publication date: March 29, 2007
    Inventors: Hyung-Gil Baek, Sang-Wook Park, Joong-Hyun Baek
  • Publication number: 20060284309
    Abstract: An integrated circuit package may include a board that may support an integrated circuit chip. A post pin may be provided on a surface of the board. The post pin may be electrically connected to the integrated circuit chip. A land pin may be provided on the other surface of the board. The land pin may be electrically connected to the integrated circuit chip.
    Type: Application
    Filed: March 10, 2006
    Publication date: December 21, 2006
    Inventors: Sang-Wook Park, Joong-Hyun Baek, Hyung-Gil Baek