Patents by Inventor Joong-Il An

Joong-Il An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11968312
    Abstract: Disclosed herein are an apparatus and method for processing vehicle data security based on a cloud.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: April 23, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sang-Woo Lee, Dae-Won Kim, Jin-Yong Lee, Boo-Sun Jeon, Bo-Heung Chung, Hong-Il Ju, Joong-Yong Choi
  • Publication number: 20100258906
    Abstract: A method of fabricating a semiconductor device includes forming a buffer insulating film over a semiconductor substrate including a conductive pattern. The buffer insulating film is etched using a storage node mask to form a buffer insulating pattern exposing the conductive pattern. The buffer insulating pattern defines a region wider than a storage node region. An etch stop film is formed over the conductive pattern and the buffer insulating pattern. An interlayer insulating film is formed over the etch stop film. The interlayer insulating film is etched using the storage node mask to expose the etch stop film. The exposed etch stop film is etched to form the storage node region exposing conductive pattern. A lower storage node is formed over the storage node region.
    Type: Application
    Filed: June 22, 2010
    Publication date: October 14, 2010
    Inventor: Joong Il CHOI
  • Patent number: 7772082
    Abstract: A method of fabricating a semiconductor device includes forming a buffer insulating film over a semiconductor substrate including a conductive pattern. The buffer insulating film is etched using a storage node mask to form a buffer insulating pattern exposing the conductive pattern. The buffer insulating pattern defines a region wider than a storage node region. An etch stop film is formed over the conductive pattern and the buffer insulating pattern. An interlayer insulating film is formed over the etch stop film. The interlayer insulating film is etched using the storage node mask to expose the etch stop film. The exposed etch stop film is etched to form the storage node region exposing conductive pattern. A lower storage node is formed over the storage node region.
    Type: Grant
    Filed: December 6, 2007
    Date of Patent: August 10, 2010
    Assignee: Hynix Semiconductor, Inc.
    Inventor: Joong Il Choi
  • Publication number: 20080261373
    Abstract: A method of fabricating a semiconductor device includes forming a buffer insulating film over a semiconductor substrate including a conductive pattern. The buffer insulating film is etched using a storage node mask to form a buffer insulating pattern exposing the conductive pattern. The buffer insulating pattern defines a region wider than a storage node region. An etch stop film is formed over the conductive pattern and the buffer insulating pattern. An interlayer insulating film is formed over the etch stop film. The interlayer insulating film is etched using the storage node mask to expose the etch stop film. The exposed etch stop film is etched to form the storage node region exposing conductive pattern. A lower storage node is formed over the storage node region.
    Type: Application
    Filed: December 6, 2007
    Publication date: October 23, 2008
    Inventor: Joong Il Choi
  • Patent number: 6803172
    Abstract: An organic anti-reflective material, in particular one which prevents back reflection from the surface of or lower layers in the semiconductor device and eliminates the standing waves and reflective notching due to the optical properties of lower layers on the wafer, and due to the changes in the thickness of the photosensitive film applied thereon. The organic anti-reflective polymer is useful for forming ultrafine patterns of 64M, 256M, 1G, and 4G DRAM semiconductor devices. A composition containing such an organic anti-reflective polymer, and an anti-reflective coating formed therefrom and a preparation method thereof are also disclosed.
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: October 12, 2004
    Assignee: Hynix Semiconductor Inc.
    Inventors: Min-ho Jung, Joong-il Choi
  • Publication number: 20030087188
    Abstract: An organic anti-reflective material, in particular one which prevents back reflection from the surface of or lower layers in the semiconductor device and eliminates the standing waves and reflective notching due to the optical properties of lower layers on the wafer, and due to the changes in the thickness of the photosensitive film applied thereon. The organic anti-reflective polymer is useful for forming ultrafine patterns of 64M, 256M, 1G, and 4G DRAM semiconductor devices. A composition containing such an organic anti-reflective polymer, and an anti-reflective coating formed therefrom and a preparation method thereof are also disclosed.
    Type: Application
    Filed: October 16, 2002
    Publication date: May 8, 2003
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Min-Ho Jung, Joong-il Choi
  • Patent number: 6326322
    Abstract: The present invention relates to a method for depositing a silicon nitride layer in which a NH3 treatment is performed in a LPCVD chamber having a high pressure valve under operational conditions of high pressure and low temperature. This has the effect of shortening a total operational time required for the NH3 treatment without any decrease in the effectiveness of nitridation. It can also prevent a loss in the operational time in the process of depositing a silicon nitride layer. The method includes the steps of: placing a wafer having an oxide layer in an LPCVD chamber having a high pressure valve under operational conditions of high pressure (for instance, 5˜300 Torr) and low temperature (for instance, 670±50° C.); performing an NH3 treatment on the wafer; and depositing a silicon nitride layer on the wafer at the same temperature as the NH3 treatment is performed at.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: December 4, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Young Kim, Kyung-Ho Hyun, Joong-Il An
  • Patent number: 6265261
    Abstract: A method of fabricating a semiconductor device includes nitriding a native oxide layer on a pattern of polysilicon layers to be used as the lower electrode of a capacitor in LPCVD equipment at a constant temperature in an environment of ammonia gas. A nitride layer is then deposited onto the nitrided native oxide layer in the in-situ state. An oxide layer is then deposited onto the entire nitride layer, and thereafter a pattern of upper electrodes are formed on the oxide layer, thereby shortening the period of time required for forming the entire nitride layer of the NO dielectric layer without any deterioration in the product quality.
    Type: Grant
    Filed: February 4, 2000
    Date of Patent: July 24, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Young Kim, Kyoung-Ho Hyon, Joong-Il An, Byung-Su Koo
  • Patent number: 6265264
    Abstract: A method of fabricating a capacitor of a semiconductor device maximizes the imurity density of HSG formed at a surface of an electrode of the capacitor and thereby improves capacitance and breakdown voltage characteristics of a DRAM device incorporating the same. The method includes forming an inter-level insulating layer having a buried contact hole which exposes the underlying semiconductor substrate, forming an amorphous polysilicon layer doped with a low density of a p-type impurity on the resultant structure, selectively etching the polysilicon layer with a mask having a pattern configured to form a bottom electrode over a predetermined portion of the inter-level insulating layer which includes the contact hole, causing HSG to grow on the exposed surface of the bottom electrode, and doping PH3 into the HSG under a “low temperature/ high pressure” process condition.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: July 24, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joong-Il An, Kyung-Ho Hyun, Byung-Su Koo, Sun-Woo Kwak
  • Patent number: 6015758
    Abstract: A method for stripping a film from a wafer substrate includes the steps of inserting a boat holding the wafer into a processing chamber of a CVD apparatus, and injecting gas into the chamber, to thereby strip the wafer of its film. A typical film requiring stripping is a polysilicon film grown on an underlying oxide layer of the substrate. In this case, CIF.sub.3 is used to strip the polysilicon film without damaging the oxide layer. Accordingly, this method is applicable to the quality testing of semiconductor wafer films using a test wafer. In such quality testing a film is formed on a test wafer substrate at the same time the semiconductor wafer film is formed. The film of the test wafer is tested to evaluate the quality of the formation of the semiconductor wafer film. The test wafer can then be stripped within the chemical vapor deposition apparatus and thus can be reused soon thereafter.
    Type: Grant
    Filed: August 26, 1998
    Date of Patent: January 18, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joong-il An, Kyung-su Kim, Jung-su Lim, Jung-ki Kim