Abstract: A semiconductor memory device may include an intergate dielectric layer of a high-K dielectric material interposed between a floating gate and a control gate. With this intergate high-K dielectric in place, the memory device may be erased using Fowler-Nordheim tunneling.

Abstract: A method for modulating the flatband voltage of semiconductor devices includes post-deposition annealing of a high-k dielectric film deposited by chemical vapor deposition, for example. The modulation of the flatband voltage, and thus, the threshold voltage of MOSFET devices, is achieved by post-deposition annealing of the high-k dielectric film and control of the annealing parameters. These include annealing gases, annealing temperatures and annealing times.

Abstract: The present invention relates to a method for producing a recombinant polynucleotides comprising the steps of generating a pool of unidirectional single-stranded polynucleotide fragments from two or more homologous double-stranded polynucleotides, conducting a polymerization process comprising multi-cyclic extension reactions using the unidirectional single-stranded polynucleotide fragments as templates and specific oligonucleotides as primers to obtain recombinant polynucleotides, and conducting a polymerase chain reaction using at least one primer to amplify the recombinant polynucleotides; and a method for constructing a recombinant DNA library comprising the steps of inserting the recombinant polynucleotide prepared by the above method into a vector and transforming an expression cell with said vector containing the recombinant polynucleotide to obtain a plurality of mutant clones.

Abstract: A portable combination apparatus having a clock display function, and a clock display method thereof. A portable combination apparatus with a clock display function has an operation part with a plurality of operation buttons, a display part for displaying current time information, and a control part for controlling such that the current time information is displayed on the display part upon selection of a predetermined operation button among the plurality of operation buttons. Accordingly, a larger clock can be displayed through a LCD of the portable combination apparatus. Accordingly, either by carrying the portable combination apparatus, or placing the apparatus on a desk or table, the user can use the portable combination apparatus also as a clock. By forming the clock display button in a location that can be easily, recognized, remembered, found, and pressed by the user, the user can conveniently check the clock.

Abstract: According to one exemplary embodiment, a method for forming a field-effect transistor on a substrate, where the substrate includes a high-k dielectric layer situated over the substrate and a gate electrode layer situated over the high-k dielectric layer, comprises a step of etching the gate electrode layer and the high-k dielectric layer to form a gate stack, where the gate stack comprises a high-k dielectric segment situated over the substrate and a gate electrode segment situated over the high-k dielectric segment. According to this exemplary embodiment, the method further comprises performing a nitridation process on the gate stack. The nitridation process can be performed by, for example, utilizing a plasma to nitridate sidewalls of the gate stack, where the plasma comprises nitrogen. The nitridation process can cause nitrogen to enter the high-k dielectric segment and form an oxygen diffusion barrier in the high-k dielectric segment, for example.

Abstract: According to one exemplary embodiment, a method for integrating first and second metal layers on a substrate to form a dual metal NMOS gate and PMOS gate comprises depositing a dielectric layer over an NMOS region and a PMOS region of the substrate. The method further comprises depositing the first metal layer over dielectric layer. The method further comprises depositing the second metal layer over the first metal layer. The method further comprises implanting nitrogen in the NMOS region of substrate and converting a first portion of the first metal layer into a metal oxide layer and converting a second portion of the first metal layer into metal nitride layer. The method further comprises forming the NMOS gate and the PMOS gate, where the NMOS gate comprises a segment of metal nitride layer and the PMOS gate comprises a segment of the metal oxide layer.

Abstract: A method of setting a web camera mode for a portable composite device is disclosed. In the portable composite device having an interface connectable with a personal computer and a zoom lens, the web camera mode setting method includes determining whether the present mode is a web camera mode in which the personal computer is connected to the interface and the device is used as a web camera, setting the zoom lens to a wide-angle mode on the basis of a preset value if the present mode is in the web camera mode, and providing an image signal corresponding to an image picked up by the zoom lens set to the wide-angle mode to the personal computer through the interface. According to the method, a user can directly use the portable composite device such as a camcorder as a web camera without any separate manipulation.

Abstract: The present invention relates to a trehalose-producing microorganism and a process for producing trehalose. It also to a novel trehalose synthase protein, a trehalose synthase gene, recombinant plasmids carrying said trehalose synthase gene, and transformed microorganism with said recombinant plasmids.

Abstract: Numerous methods for forming various semiconductor structures are disclosed. In one embodiment, a layered dielectric structure of alternating sub-layers of a first dielectric material and a second dielectric material is formed on a suitable semiconductor substrate. In this embodiment, the layered dielectric structure comprises an alternating pattern of at least two sub-layers of a first dielectric material which is a high-K dielectric material and at least one layer of a second dielectric material which is a standard-K dielectric material, wherein at least one of the one or more second dielectric material sub-layers contain nitrogen implanted therein using a nitridation step.

Abstract: A method of forming a dielectric layer includes placing a semiconductor wafer in a reaction chamber. Oxygen, hafnium and silicon sources are separately provided to the reaction chamber to react with the wafer. After each source has reacted, a monolayer or near-monolayer film is produced. Each source may also be provided to the reaction chamber a number of times to achieve a film having the desired thickness.

Abstract: Numerous methods for forming various semiconductor structures are disclosed. In one embodiment, a layered dielectric structure of alternating sub-layers of a first dielectric material and a second dielectric material is formed on a suitable semiconductor substrate. In this embodiment, the layered dielectric structure comprises an alternating pattern of at least two sub-layers of a first dielectric material which is a high-K dielectric material and at least one layer of a second dielectric material which is a standard-K dielectric material, wherein at least one of the one or more second dielectric material sub-layers contain nitrogen implanted therein using a nitridation step.

Abstract: This invention relates to a method for recovering useful products from soy fractions with high efficiency, and more specifically to increasing the recovery yield of pinitol or chiro-inositol from soy fractions, in which it is contained by a process comprising the steps of culturing a microorganism to transform pinitol derivatives into pinitol in soy fractions, thereby to increase the pinitol content in soy fractions, followed by removing microorganisms, insoluble materials and other macromolecules from said fractions by centrifugation or filtration to obtain an aqueous solution containing pinitol or chiro-inositol, contacting said solution with activated carbon to adsorb the pinitol or chiro-inositol, contacting said solution with activated carbon to adsorb the pinitol or chiro-inositol, and then recovering it by stepwise or gradient elution with an organic solvent.

Abstract: A method of manufacturing an integrated circuit on a substrate provides a gate structure including single crystalline material. The method can provide a first amorphous or polycrystalline semiconductor layer above a top surface of the substrate and patterning the first amorphous semiconductor layer to form a first gate conductor. The process can also include utilizing solid phase epitaxy to form a single crystal layer above the first gate conductor and patterning the single crystal layer to form a second gate conductor including the single crystal layer.

Abstract: The present invention relates to a MOS transistor structure and method of manufacture which provides a high-k dielectric gate insulator for reduced gate current leakage while concurrently reducing remote scattering, thereby improving transistor carrier mobility.

Abstract: One aspect of the invention relates to forming a high-k dielectric layer comprising a Group IVB metal compound, especially HfO2, HfSixOy or HfSixOyNz. According to the invention, these compounds are formed by molecular layer deposition. According to another aspect of the invention, molecular layer deposition is used to add silicon oxynitride to the dielectric. The silicon oxynitride provides a barrier to diffusion of dopants from the gate to the channel region.

Abstract: The present invention relates to a method for producing a recombinant polynucleotides comprising the steps of generating a pool of unidirectional single-stranded polynucleotide fragments from two or more homologous double-stranded polynucleotides, conducting a polymerization process comprising multi-cyclic extension reactions using the unidirectional single-stranded polynucleotide fragments as templates and specific oligonucleotides as primers to obtain recombinant polynucleotides, and conducting a polymerase chain reaction using at least one primer to amplify the recombinant polynucleotides; and a method for constructing a recombinant DNA library comprising the steps of inserting the recombinant polynucleotide prepared by the above method into a vector and transforming an expression cell with said vector containing the recombinant polynucleotide to obtain a plurality of mutant clones.

Abstract: A semiconductor device and a method of making the semiconductor device having a composite dielectric layer including steps of providing a semiconductor substrate; depositing on the semiconductor substrate alternating sub-layers of a high-K dielectric material and a dielectric precursor material to form a composite layer having at least two sub-layers of at least one of the high-K dielectric material and the dielectric precursor material. The semiconductor device may be subjected to annealing at an elevated temperature to form a composite dielectric layer from the composite layer.

Abstract: A semiconductor device and a method of making the semiconductor device having a composite dielectric layer including steps of providing a semiconductor substrate; depositing on the semiconductor substrate alternating sub-layers of a first dielectric material and a second dielectric material to form a layered dielectric structure having at least two sub-layers of at least one of the first dielectric material and the second dielectric material, wherein one of the first dielectric material and the second dielectric material is a high-K. dielectric material and an other of the first dielectric material and the second dielectric material is a standard-K dielectric material; and annealing the layered dielectric structure at an elevated temperature to form a composite dielectric layer.

Abstract: A method and article of manufacture of an ultra-thin base oxide or nitrided oxide layer in a CMOS device. The method and article of manufacture are formed by providing a silicon wafer with an initial oxide layer which is removed from the silicon wafer by a hydrogen baking step. A new oxide layer or nitrided oxide layer is formed by thermal growth on the silicon wafer surface. A portion of the new oxide layer is removed by hydrogen annealing. A MOSFET can be created by forming a gate electrode structure on a high-k dielectric material deposited on the new oxide layer.

Abstract: For fabricating a PMOS (P-channel Metal Oxide Semiconductor) field effect transistor on a semiconductor substrate, a layer of gate dielectric material containing nitrogen is deposited on the semiconductor substrate, and a layer of gate electrode material is deposited on the layer of gate dielectric material. A first P-type dopant, such as boron for example, is implanted into a first region of the layer of gate electrode material disposed over a first active device area of the semiconductor substrate. The first region of the layer of gate electrode material is patterned to form a PMOS gate electrode. The layer of gate dielectric material is patterned to form a PMOS gate dielectric disposed under the PMOS gate electrode.