Patents by Inventor JoongGi Kim

JoongGi Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9679846
    Abstract: A semiconductor device has a semiconductor die with a plurality of bumps formed over a surface of the semiconductor die. A first conductive layer having first and second segments is formed over a surface of the substrate with a first vent separating an end of the first segment and the second segment and a second vent separating an end of the second segment and the first segment. A second conductive layer is formed over the surface of the substrate to electrically connect the first segment and second segment. The thickness of the second conductive layer can be less than a thickness of the first conductive layer to form the first vent and second vent. The semiconductor die is mounted to the substrate with the bumps aligned to the first segment and second segment. Bump material from reflow of the bumps is channeled into the first vent and second vent.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: June 13, 2017
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: JaeHyun Lee, SunJae Kim, JoongGi Kim
  • Publication number: 20150097295
    Abstract: A semiconductor device has a semiconductor die with a plurality of bumps formed over a surface of the semiconductor die. A first conductive layer having first and second segments is formed over a surface of the substrate with a first vent separating an end of the first segment and the second segment and a second vent separating an end of the second segment and the first segment. A second conductive layer is formed over the surface of the substrate to electrically connect the first segment and second segment. The thickness of the second conductive layer can be less than a thickness of the first conductive layer to form the first vent and second vent. The semiconductor die is mounted to the substrate with the bumps aligned to the first segment and second segment. Bump material from reflow of the bumps is channeled into the first vent and second vent.
    Type: Application
    Filed: December 16, 2014
    Publication date: April 9, 2015
    Applicant: STATS CHIPPAC, LTD.
    Inventors: JaeHyun Lee, SunJae Kim, JoongGi Kim
  • Patent number: 8952529
    Abstract: A semiconductor device has a semiconductor die with a plurality of bumps formed over a surface of the semiconductor die. A first conductive layer having first and second segments is formed over a surface of the substrate with a first vent separating an end of the first segment and the second segment and a second vent separating an end of the second segment and the first segment. A second conductive layer is formed over the surface of the substrate to electrically connect the first segment and second segment. The thickness of the second conductive layer can be less than a thickness of the first conductive layer to form the first vent and second vent. The semiconductor die is mounted to the substrate with the bumps aligned to the first segment and second segment. Bump material from reflow of the bumps is channeled into the first vent and second vent.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: February 10, 2015
    Assignee: STATS ChipPAC, Ltd.
    Inventors: JaeHyun Lee, SunJae Kim, JoongGi Kim
  • Publication number: 20130127042
    Abstract: A semiconductor device has a semiconductor die with a plurality of bumps formed over a surface of the semiconductor die. A first conductive layer having first and second segments is formed over a surface of the substrate with a first vent separating an end of the first segment and the second segment and a second vent separating an end of the second segment and the first segment. A second conductive layer is formed over the surface of the substrate to electrically connect the first segment and second segment. The thickness of the second conductive layer can be less than a thickness of the first conductive layer to form the first vent and second vent. The semiconductor die is mounted to the substrate with the bumps aligned to the first segment and second segment. Bump material from reflow of the bumps is channeled into the first vent and second vent.
    Type: Application
    Filed: November 22, 2011
    Publication date: May 23, 2013
    Applicant: STATS CHIPPAC, LTD.
    Inventors: JaeHyun Lee, SunJae Kim, JoongGi Kim