Patents by Inventor Joonghee Kim
Joonghee Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12238920Abstract: A semiconductor device includes bit line structures disposed on a substrate, each bit line structure comprising a bit line and an insulating spacer structure, buried contacts which fill lower portions of spaces between bit line structures in the substrate, and landing pads which fill upper portions of the spaces, extend from upper surfaces of the buried contacts to upper surfaces of the bit line structures, and are spaced apart from each other by insulating structures. A first insulating structure is disposed between a first landing pad and a first bit line structure. The first insulating structure includes a sidewall extending along a sidewall of the first landing pad toward the substrate. In a direction extending toward the substrate, the sidewall of the first insulating structure gets closer to a first sidewall of the first bit line structure.Type: GrantFiled: October 21, 2022Date of Patent: February 25, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jihee Kim, Yeongshin Park, Hyunchul Yoon, Joonghee Kim, Jungheun Hwang
-
Publication number: 20250022191Abstract: In an aspect, exemplary embodiments of the present disclosure provide a training image generation method and device that can generate training images in large quantity by varying image formats and signal patterns to solve the problems that are generated when two-dimensional image training is performed using only one format without considering variety of formats, for example, a technology for generating training images that are used to training an image-based artificial intelligence model for analyzing images obtained from multi-channel one-dimensional signals, and a method and device for performing the technology.Type: ApplicationFiled: December 2, 2022Publication date: January 16, 2025Inventor: Joonghee KIM
-
Publication number: 20240338733Abstract: A medical advertisement targeting system or apparatus according to an embodiment comprises: a reception unit which receives medical information including one or more attributes from one or more terminals; a first generation unit which generates summary information extracted from the medical information on the basis of the one or more attributes; a second generation unit which generates a summary vector corresponding to the summary information by digitizing the summary information using a pre-trained model; a calculation unit which calculates a degree of matching between the summary vector and one or more candidate produces by using a preset function; and a determination unit which determines a product-to-be-advertised to be displayed on a terminal-to-advertise, from among the candidate products, on the basis of the degree of matching. A medical advertisement targeting system, apparatus, and method according to an embodiment may provide more efficient targeted advertisements.Type: ApplicationFiled: October 14, 2022Publication date: October 10, 2024Inventor: Joonghee KIM
-
Publication number: 20240335170Abstract: Embodiments relate to a system and method for electrocardiogram image-based patient evaluation, wherein: a source electrocardiogram image of a target patient is acquired by a user terminal; a server is requested by the user terminal to evaluate the target patient, the request including the source electrocardiogram image; electrocardiogram image-based evaluation information of the patient is generated by the server, the evaluation information of the target patient is transmitted to the user terminal; and reported feedback based on the evaluation information of the target patient is provided by the user terminal.Type: ApplicationFiled: April 15, 2022Publication date: October 10, 2024Applicant: Seoul National University HospitalInventor: Joonghee Kim
-
Publication number: 20240290444Abstract: Provided is a programmable electronic medical record system capable of helping medical staff to efficiently and effectively process medical examination information. The electronic medical record system is a programmable electronic medical record system comprising: a medical staff terminal comprising an input window enabling the inputting of a statement script expressed using objects and methods, and an output window for displaying a data processing result according to the statement script; and an electronic medical record server communicating with the medical staff terminal, receiving the statement script and carrying out data processing which is preset, and then transmitting the result thereof to the medical staff terminal.Type: ApplicationFiled: August 17, 2021Publication date: August 29, 2024Inventor: Joonghee Kim
-
Publication number: 20240212843Abstract: Embodiments relate to a method and apparatus for extracting numerical vector information by using a deep learning algorithm from electrical biosignal data, particularly, single-channel or multi-channel electrocardiogram signals, or black-and-white or color electrocardiogram images obtained on the basis of the electrocardiogram signals, and to a method and apparatus for analyzing and predicting a disease, and providing diagnostic auxiliary information about the disease by using the method and apparatus.Type: ApplicationFiled: December 29, 2021Publication date: June 27, 2024Inventor: Joonghee Kim
-
Publication number: 20230317257Abstract: The embodiments relate to a method for predicting needs of a patient for hospital resources, and a system for carrying out same, the method comprising the steps of: generating numerical data per information type by encoding natural language data and structured data, which are in patient data recorded in language and digits; and, by applying the numerical data per information type to an artificial neural network, predicting a task corresponding to the needs of the patient for hospital resources.Type: ApplicationFiled: May 20, 2021Publication date: October 5, 2023Inventors: Joonghee KIM, Joo JEONG, Dae Kon KIM
-
Publication number: 20230037972Abstract: A semiconductor device includes bit line structures disposed on a substrate, each bit line structure comprising a bit line and an insulating spacer structure, buried contacts which fill lower portions of spaces between bit line structures in the substrate, and landing pads which fill upper portions of the spaces, extend from upper surfaces of the buried contacts to upper surfaces of the bit line structures, and are spaced apart from each other by insulating structures. A first insulating structure is disposed between a first landing pad and a first bit line structure. The first insulating structure includes a sidewall extending along a sidewall of the first landing pad toward the substrate. In a direction extending toward the substrate, the sidewall of the first insulating structure gets closer to a first sidewall of the first bit line structure.Type: ApplicationFiled: October 21, 2022Publication date: February 9, 2023Inventors: Jihee Kim, Yeongshin Park, Hyunchul Yoon, Joonghee Kim, Jungheun Hwang
-
Patent number: 11508732Abstract: A semiconductor device includes bit line structures disposed on a substrate, each bit line structure comprising a bit line and an insulating spacer structure, buried contacts which fill lower portions of spaces between bit line structures in the substrate, and landing pads which fill upper portions of the spaces, extend from upper surfaces of the buried contacts to upper surfaces of the bit line structures, and are spaced apart from each other by insulating structures. A first insulating structure is disposed between a first landing pad and a first bit line structure. The first insulating structure includes a sidewall extending along a sidewall of the first landing pad toward the substrate. In a direction extending toward the substrate, the sidewall of the first insulating structure gets closer to a first sidewall of the first bit line structure.Type: GrantFiled: September 22, 2020Date of Patent: November 22, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jihee Kim, Yeongshin Park, Hyunchul Yoon, Joonghee Kim, Jungheun Hwang
-
Patent number: 11380552Abstract: In order to manufacture an integrated circuit device, a feature layer is formed on a substrate in a first area for forming a plurality of chips and in a second area surrounding the first area. The feature layer has a step difference in the second area. On the feature layer, a hard mask structure including a plurality of hard mask layers stacked on each other is formed. In the first area and the second area, a protective layer covering the hard mask structure is formed. On the protective layer, a photoresist layer is formed. A photoresist pattern is formed by exposing and developing the photoresist layer in the first area by using the step difference in the second area as an alignment key.Type: GrantFiled: April 25, 2020Date of Patent: July 5, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyunchul Yoon, Mincheol Kwak, Joonghee Kim, Jihee Kim, Yeongshin Park, Jungheun Hwang
-
Publication number: 20210210493Abstract: A semiconductor device includes bit line structures disposed on a substrate, each bit line structure comprising a bit line and an insulating spacer structure, buried contacts which fill lower portions of spaces between bit line structures in the substrate, and landing pads which fill upper portions of the spaces, extend from upper surfaces of the buried contacts to upper surfaces of the bit line structures, and are spaced apart from each other by insulating structures. A first insulating structure is disposed between a first landing pad and a first bit line structure. The first insulating structure includes a sidewall extending along a sidewall of the first landing pad toward the substrate. In a direction extending toward the substrate, the sidewall of the first insulating structure gets closer to a first sidewall of the first bit line structure.Type: ApplicationFiled: September 22, 2020Publication date: July 8, 2021Inventors: Jihee Kim, Yeongshin Park, Hyunchul Yoon, Joonghee Kim, Jungheun Hwang
-
Publication number: 20210098260Abstract: In order to manufacture an integrated circuit device, a feature layer is formed on a substrate in a first area for forming a plurality of chips and in a second area surrounding the first area. The feature layer has a step difference in the second area. On the feature layer, a hard mask structure including a plurality of hard mask layers stacked on each other is formed. In the first area and the second area, a protective layer covering the hard mask structure is formed. On the protective layer, a photoresist layer is formed. A photoresist pattern is formed by exposing and developing the photoresist layer in the first area by using the step difference in the second area as an alignment key.Type: ApplicationFiled: April 25, 2020Publication date: April 1, 2021Inventors: Hyunchul YOON, Mincheol KWAK, Joonghee KIM, Jihee KIM, Yeongshin PARK, Jungheun HWANG
-
Patent number: 10580688Abstract: Disclosed is a method of fabricating a semiconductor device. The method comprises stacking an etching target layer, a first mask layer, an under layer, and a photoresist layer on a substrate, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, and performing a nitrogen plasma treatment on the photoresist pattern while using the first mask layer as an etching stop layer, the performing continuing until a top surface of the first mask layer is exposed. During the performing, the under layer is etched to form an under pattern below the photoresist pattern.Type: GrantFiled: July 17, 2018Date of Patent: March 3, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun-Chul Yoon, Yeong-Shin Park, Joonghee Kim, Jihee Kim, Dongjun Shin, Kukhan Yoon, Taeseop Choi, Jungheun Hwang
-
Publication number: 20190214295Abstract: Disclosed is a method of fabricating a semiconductor device. The method comprises stacking an etching target layer, a first mask layer, an under layer, and a photoresist layer on a substrate, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, and performing a nitrogen plasma treatment on the photoresist pattern while using the first mask layer as an etching stop layer, the performing continuing until a top surface of the first mask layer is exposed. During the performing, the under layer is etched to form an under pattern below the photoresist pattern.Type: ApplicationFiled: July 17, 2018Publication date: July 11, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: Hyun-Chul YOON, Yeong-Shin Park, Joonghee Kim, Jihee Kim, Dongjun Shin, Kukhan Yoon, Taeseop Choi, Jungheun Hwang