Abstract: Provided are a semiconductor chip with a reduced thickness and improved reliability, and a semiconductor package including the semiconductor chip. The semiconductor chip includes a semiconductor substrate, an integrated device layer on the semiconductor substrate, a multi-wiring layer on the integrated device layer, and a pad metal layer of a plurality of pad metal layers on the multi-wiring layer, and having test pads defined therein. The pad metal layers extend in a first direction parallel to a top surface of the semiconductor substrate or in a second direction perpendicular to the first direction. A test pad is a central portion of the pad metal layer and, and an outer portion of the pad metal layer excluding the test pad overlaps the wires in a third direction perpendicular to the top surface of the semiconductor substrate.

Abstract: A semiconductor device may include lower metal wirings on a substrate, a first upper insulating interlayer on the lower metal wirings, a first upper wiring including a first upper via in the first upper insulating interlayer and a first upper metal pattern on the first upper insulating interlayer. The semiconductor device may also include a second upper insulating interlayer on the first upper insulating interlayer, an uppermost wiring including an uppermost via in the second upper insulating interlayer, an uppermost metal pattern on the second upper insulating interlayer, and an oxide layer for supplying hydrogen on the second upper insulating interlayer. The lower metal wirings may be stacked in a plurality of layers. The oxide layer for supplying hydrogen may cover the uppermost wiring. A thickness of the uppermost via may be less than 40% of a thickness of the uppermost metal pattern.

Abstract: It is to be understood that while the invention has been described in conjunction with the detailed description thereof, the foregoing description is intended to illustrate and not limit the scope of the invention, which is defined by the scope of the appended claims. Other aspects, advantages, and modifications are within the scope of the following claims.

Abstract: It is to be understood that while the invention has been described in conjunction with the detailed description thereof, the foregoing description is intended to illustrate and not limit the scope of the invention, which is defined by the scope of the appended claims. Other aspects, advantages, and modifications are within the scope of the following claims.

Abstract: Provided are antibodies and antigen-binding fragment thereof that bind to VSIG4. Various in vitro and in vivo methods and compositions related to antibodies. Methods include prevention and/or therapeutic treatment of cancer using an antibody or an antigen-binding fragment that binds to VSIG4.

Abstract: Provided are antibodies and antigen-binding fragment thereof that bind to VSIG4. Various in vitro and in vivo methods and compositions related to antibodies. Methods include prevention and/or therapeutic treatment of cancer using an antibody or an antigen-binding fragment that binds to VSIG4.

Abstract: Provided is a method of preparing a ZSM-5 catalyst for preparing light olefins including ethylene and propylene through a catalytic cracking of a hydrocarbon mixture of C4 to C7 produced after a naphtha cracking. The method includes (a) forming a gel by aging a mixture solution including a silica precursor and an aluminum precursor; (b) adding a template possibly forming mesopores through a heat treatment, into the gel, stirring and then aging; (c) forming a solid product by crystallizing the aged mixture in step (b); and (d) heat treating the solid product to remove the template. The ZSM-5 catalyst may include micropores and mesopores and may have good physical and chemical properties along with a good pore property. The production yield of the light olefins may be increased.