Patents by Inventor Joon-Suc Jang
Joon-Suc Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10573389Abstract: An operating method of a storage device includes a controller: receiving read data from a non-volatile memory; measuring a plurality of threshold voltage distributions respectively corresponding to a plurality of memory units of the non-volatile memory, based on the received read data; measuring a distribution variation between the plurality of memory units, based on the measured plurality of threshold voltage distributions; dynamically determining operation parameters for the non-volatile memory, based on the measured distribution variation; and transmitting, to the non-volatile memory, an operate command, an address, and at least one operation parameter corresponding to the address.Type: GrantFiled: June 21, 2018Date of Patent: February 25, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Chan-Ha Kim, Suk-Eun Kang, Ji-Su Kim, Seung-Kyung Ro, Dong-Gi Lee, Yun-Jung Lee, Jin-Wook Lee, Hee-Won Lee, Joon-Suc Jang, Young-Ha Choi
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Publication number: 20190115078Abstract: An operating method of a storage device includes a controller: receiving read data from a non-volatile memory; measuring a plurality of threshold voltage distributions respectively corresponding to a plurality of memory units of the non-volatile memory, based on the received read data; measuring a distribution variation between the plurality of memory units, based on the measured plurality of threshold voltage distributions; dynamically determining operation parameters for the non-volatile memory, based on the measured distribution variation; and transmitting, to the non-volatile memory, an operate command, an address, and at least one operation parameter corresponding to the address.Type: ApplicationFiled: June 21, 2018Publication date: April 18, 2019Inventors: CHAN-HA KIM, SUK-EUN KANG, JI-SU KIM, SEUNG-KYUNG RO, DONG-GI LEE, YUN-JUNG LEE, JIN-WOOK LEE, HEE-WON LEE, JOON-SUC JANG, YOUNG-HA CHOI
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Patent number: 9921749Abstract: A method of operating a memory system, including a memory device, includes managing program order information of the memory device based on a program order stamp (POS) indicating a relative temporal relationship between program operations of a plurality of memory groups that are included in the memory device. The method includes generating a first mapping table that stores a read voltage offset and an upper POS corresponding to the read voltage offset, by using a plurality of voltage levels that are sequentially decreased or reduced, and generating a second mapping table that stores the read voltage offset and a lower POS corresponding to the read voltage offset, by using a plurality of voltage levels that are sequentially increased. A read voltage for performing a read operation on the memory device is variably determined based on the first and second mapping tables and the program order information.Type: GrantFiled: June 18, 2015Date of Patent: March 20, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Kyung-Ryun Kim, Joon-Suc Jang
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Patent number: 9852795Abstract: A method of operating a nonvolatile memory device includes performing a first memory operation on a first memory block of a plurality of memory blocks and a curing operation on a portion of the first memory block when a status signal indicates a ready state of the nonvolatile memory device during an interval equal to or greater than a reference interval after the first memory operation is completed. The nonvolatile memory device includes the plurality of memory blocks, each memory block including a plurality of vertical strings extending in a vertical direction with respect to a substrate.Type: GrantFiled: September 22, 2016Date of Patent: December 26, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dong-Ku Kang, Sang-Yong Yoon, Joon-Suc Jang
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Patent number: 9818475Abstract: In method of programming a nonvolatile memory device including a plurality of multi-level cells that store multi-bit data according to example embodiments, a least significant bit (LSB) program operation is performed to program LSBs of the multi-bit data in the plurality of multi-level cells. A most significant bit (MSB) program operation is performed to program MSBs of the multi-bit data in the plurality of multi-level cells. To perform the MSB program, an MSB pre-program operation is performed on first multi-level cells, from among the plurality of multi-level cells, that are to be programmed to a highest target program state among a plurality of target program states, and an MSB main program operation is performed to program the plurality of multi-level cells to the plurality of target program states corresponding to the multi-bit data.Type: GrantFiled: January 21, 2016Date of Patent: November 14, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Joon-Suc Jang, Dong-Hun Kwak
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Publication number: 20170092361Abstract: A method of operating a nonvolatile memory device includes performing a first memory operation on a first memory block of a plurality of memory blocks and a curing operation on a portion of the first memory block when a status signal indicates a ready state of the nonvolatile memory device during an interval equal to or greater than a reference interval after the first memory operation is completed. The nonvolatile memory device includes the plurality of memory blocks, each memory block including a plurality of vertical strings extending in a vertical direction with respect to a substrate.Type: ApplicationFiled: September 22, 2016Publication date: March 30, 2017Inventors: DONG-KU KANG, SANG-YONG YOON, JOON-SUC JANG
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Publication number: 20160141025Abstract: In method of programming a nonvolatile memory device including a plurality of multi-level cells that store multi-bit data according to example embodiments, a least significant bit (LSB) program operation is performed to program LSBs of the multi-bit data in the plurality of multi-level cells. A most significant bit (MSB) program operation is performed to program MSBs of the multi-bit data in the plurality of multi-level cells. To perform the MSB program, an MSB pre-program operation is performed on first multi-level cells, from among the plurality of multi-level cells, that are to be programmed to a highest target program state among a plurality of target program states, and an MSB main program operation is performed to program the plurality of multi-level cells to the plurality of target program states corresponding to the multi-bit data.Type: ApplicationFiled: January 21, 2016Publication date: May 19, 2016Inventors: Joon-Suc Jang, Dong-Hun Kwak
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Publication number: 20160124642Abstract: A method of operating a memory system, including a memory device, includes managing program order information of the memory device based on a program order stamp (POS) indicating a relative temporal relationship between program operations of a plurality of memory groups that are included in the memory device. The method includes generating a first mapping table that stores a read voltage offset and an upper POS corresponding to the read voltage offset, by using a plurality of voltage levels that are sequentially reduced, and generating a second mapping table that stores the read voltage offset and a lower POS corresponding to the read voltage offset, by using a plurality of voltage levels that are sequentially increased. Furthermore, a read voltage for performing a read operation on the memory device is variably determined based on the first and second mapping tables and the program order information.Type: ApplicationFiled: June 18, 2015Publication date: May 5, 2016Inventors: KYUNG-RYUN KIM, JOON-SUC JANG
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Patent number: 9281069Abstract: In method of programming a nonvolatile memory device including a plurality of multi-level cells that store multi-bit data according to example embodiments, a least significant bit (LSB) program operation is performed to program LSBs of the multi-bit data in the plurality of multi-level cells. A most significant bit (MSB) program operation is performed to program MSBs of the multi-bit data in the plurality of multi-level cells. To perform the MSB program, an MSB pre-program operation is performed on first multi-level cells, from among the plurality of multi-level cells, that are to be programmed to a highest target program state among a plurality of target program states, and an MSB main program operation is performed to program the plurality of multi-level cells to the plurality of target program states corresponding to the multi-bit data.Type: GrantFiled: May 9, 2014Date of Patent: March 8, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Joon-Suc Jang, Dong-Hun Kwak
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Publication number: 20140247657Abstract: In method of programming a nonvolatile memory device including a plurality of multi-level cells that store multi-bit data according to example embodiments, a least significant bit (LSB) program operation is performed to program LSBs of the multi-bit data in the plurality of multi-level cells. A most significant bit (MSB) program operation is performed to program MSBs of the multi-bit data in the plurality of multi-level cells. To perform the MSB program, an MSB pre-program operation is performed on first multi-level cells, from among the plurality of multi-level cells, that are to be programmed to a highest target program state among a plurality of target program states, and an MSB main program operation is performed to program the plurality of multi-level cells to the plurality of target program states corresponding to the multi-bit data.Type: ApplicationFiled: May 9, 2014Publication date: September 4, 2014Inventors: Joon-Suc JANG, Dong-Hun KWAK
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Patent number: 8681543Abstract: A method of programming a nonvolatile memory device comprises pre-programming multi-bit data in a plurality of multi-level memory cells, reading the pre-programmed multi-bit data from the plurality of multi-level cells based on state group codes indicating state groups of the plurality of multi-level cells, and re-programming the read multi-bit data to the plurality of multi-level cells.Type: GrantFiled: February 4, 2013Date of Patent: March 25, 2014Assignee: Samsung Electronics Co., Ltd.Inventor: Joon-Suc Jang
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Patent number: 8681545Abstract: To program a semiconductor memory device, a plurality of target threshold voltage groups are set by dividing target threshold voltages representing states of memory cells. The target threshold voltage groups are substantially simultaneously programmed by applying a plurality of program voltages to a word line. Program end times for the target threshold voltage groups are adjusted.Type: GrantFiled: May 16, 2013Date of Patent: March 25, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Si-Hwan Kim, Joon-Suc Jang, Duck-Kyeun Woo
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Publication number: 20130250680Abstract: To program a semiconductor memory device, a plurality of target threshold voltage groups are set by dividing target threshold voltages representing states of memory cells. The target threshold voltage groups are substantially simultaneously programmed by applying a plurality of program voltages to a word line. Program end times for the target threshold voltage groups are adjusted.Type: ApplicationFiled: May 16, 2013Publication date: September 26, 2013Applicant: Samsung Electronics Co., Ltd.Inventors: Si-Hwan Kim, Joon-Suc Jang, Duck-Kyeun Woo
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Patent number: 8499210Abstract: A flash memory device includes a plurality of memory cells each configured to store k-bit data, where k is a natural number greater than one. The device is programmed by a method including reading (i?1)-th order data from a selected memory cell connected to a selected wordline before programming i-th order data in one or more adjacent memory cells connected to an adjacent wordline, wherein i is a natural number between two and k, storing as read data the (i?1)-th order data read from the selected memory cell, and programming i-th order data in the selected memory cell based on the stored read data.Type: GrantFiled: November 10, 2010Date of Patent: July 30, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Si-Hwan Kim, Joon-Suc Jang, Ki-Hwan Choi, Duck-Kyun Woo
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Patent number: 8446775Abstract: To program a semiconductor memory device, a plurality of target threshold voltage groups are set by dividing target threshold voltages representing states of memory cells. The target threshold voltage groups are substantially simultaneously programmed by applying a plurality of program voltages to a word line. Program end times for the target threshold voltage groups are adjusted.Type: GrantFiled: October 15, 2010Date of Patent: May 21, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Si-Hwan Kim, Joon-Suc Jang, Duck-Kyun Woo
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Patent number: 8391062Abstract: A method of programming a nonvolatile memory device comprises pre-programming multi-bit data in a plurality of multi-level memory cells, reading the pre-programmed multi-bit data from the plurality of multi-level cells based on state group codes indicating state groups of the plurality of multi-level cells, and re-programming the read multi-bit data to the plurality of multi-level cells.Type: GrantFiled: May 17, 2010Date of Patent: March 5, 2013Assignee: Samsung Electronics Co., Ltd.Inventor: Joon-Suc Jang
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Patent number: 8385120Abstract: A method of programming a nonvolatile memory device is provided. The method includes providing a plurality of memory cells coupled to a wordline, the plurality of memory cells grouped into a plurality of groups, each group including at least two memory cells, such that for each cell of the plurality of memory cells that has memory cells adjacent both sides, the memory cells immediately adjacent either side of the cell belong to different groups from each other. The method further includes selecting one group from the plurality of groups, and performing a program operation including applying a program pulse to the selected group while one or more non-selected groups of the plurality of groups are inhibited from being programmed.Type: GrantFiled: October 22, 2010Date of Patent: February 26, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Joon-Suc Jang, Ki-Hwan Choi, Duck-Kyun Woo, Si-Hwan Kim
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Publication number: 20120170364Abstract: In method of programming a nonvolatile memory device including a plurality of multi-level cells that store multi-bit data according to example embodiments, a least significant bit (LSB) program operation is performed to program LSBs of the multi-bit data in the plurality of multi-level cells. A most significant bit (MSB) program operation is performed to program MSBs of the multi-bit data in the plurality of multi-level cells. To perform the MSB program, an MSB pre-program operation is performed on first multi-level cells, from among the plurality of multi-level cells, that are to be programmed to a highest target program state among a plurality of target program states, and an MSB main program operation is performed to program the plurality of multi-level cells to the plurality of target program states corresponding to the multi-bit data.Type: ApplicationFiled: November 28, 2011Publication date: July 5, 2012Inventors: Joon-Suc Jang, Dong-Hun Kwak
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Publication number: 20110145668Abstract: A flash memory device comprises a plurality of memory cells each configured to store k-bit data, where k is a natural number greater than one. The device is programmed by a method comprising reading (i?1)-th order data from a selected memory cell connected to a selected wordline before programming i-th order data in one or more adjacent memory cells connected to an adjacent wordline, wherein i is a natural number between two and k, storing as read data the (i?1)-th order data read from the selected memory cell, and programming i-th order data in the selected memory cell based on the stored read data.Type: ApplicationFiled: November 10, 2010Publication date: June 16, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Si-Hwan KIM, Joon-Suc JANG, Ki-Hwan CHOI, Duck-Kyun WOO
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Publication number: 20110122697Abstract: A method of programming a nonvolatile memory device is disclosed. The method includes providing a plurality of memory cells coupled to a wordline, the plurality of memory cells grouped into a plurality of groups, each group including at least two memory cells, such that for each cell of the plurality of memory cells that has memory cells adjacent both sides, the memory cells immediately adjacent either side of the cell belong to different groups from each other. The method further includes selecting one group from the plurality of groups, and performing a program operation including applying a program pulse to the selected group while one or more non-selected groups of the plurality of groups are inhibited from being programmed.Type: ApplicationFiled: October 22, 2010Publication date: May 26, 2011Inventors: Joon-Suc Jang, Ki-Hwan Choi, Duck-Kyun Woo, Si-Hwan Kim